Spatial wafer processing with improved temperature uniformity

US10787739B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10787739-B2
Application numberUS-201916658393-A
CountryUS
Kind codeB2
Filing dateOct 21, 2019
Priority dateOct 29, 2018
Publication dateSep 29, 2020
Grant dateSep 29, 2020

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Apparatus and methods to process one or more wafers are described. A processing chamber comprises a first processing station comprising a first gas injector having a first face, a first emissivity and a first temperature, a second processing station comprising a second gas injector having a second face, a second emissivity and a second temperature, and a substrate support assembly comprising a plurality of substantially coplanar support surfaces, the substrate support assembly configured to move the support surfaces between the first processing station and the second processing station. When a wafer is on the support surfaces, a temperature skew of less than about 0.5° C. is developed upon moving the wafer between the stations in about 0.5 seconds.

First claim

Opening claim text (preview).

What is claimed is: 1. A processing chamber comprising: a first processing station comprising a first gas injector having a first face, a first emissivity and a first temperature; a second processing station comprising a second gas injector having a second face, a second emissivity and a second temperature; and a substrate support assembly comprising a plurality of substantially coplanar support surfaces, the substrate support assembly configured to move the support surfaces between the first processing station and the second processing station, wherein the first face is spaced a first distance from the plurality of substantially coplanar support surfaces and the second face is spaced a second distance from the plurality of substantially coplanar support surfaces, the second distance greater than the first distance, and the first emissivity is lower than the second emissivity and/or the first temperature is greater than the second temperature. 2. The processing chamber of claim 1 , wherein when a wafer is on the support surfaces, a temperature skew of less than about 0.5° C. is developed upon moving the wafer between the first processing station and the second processing station in about 0.5 seconds. 3. The processing chamber of claim 1 , wherein the first emissivity and the second emissivity are different and the first temperature and the second temperature are different. 4. The processing chamber of claim 1 , wherein the first emissivity and the second emissivity are different and the first temperature and the second temperature are the same. 5. The processing chamber of claim 1 , further comprising a controller connected to the plurality of substantially coplanar support surfaces configured to control one or more of the first temperature or the second temperature. 6. The processing chamber of claim 1 , wherein the first processing station comprises a thermal station and the second processing station comprises a plasma station. 7. The processing chamber of claim 1 , wherein the first processing station comprises a thermal station and the second processing station comprises a thermal station. 8. The processing chamber of claim 1 , further comprising at least one wafer on the support surfaces. 9. The processing chamber of claim 8 , wherein the first emissivity and the first temperature and/or the second emissivity and the second temperature provide a steady state temperature of the wafer in the first processing station and in the second processing station. 10. A processing method comprising: moving a substrate support surface between a first processing station and a second processing station, the first processing station comprising a first gas injector having a first face spaced a first distance from the substrate support surface, a first emissivity and a first temperature, the second processing station comprising a second gas injector having a second face spaced a second distance from the substrate support surface, a second emissivity and a second temperature, wherein the second distance is greater than the first distance and wherein the first emissivity is lower than the second emissivity and/or the first temperature is greater than the second temperature. 11. The processing method of claim 10 , further comprising controlling one or more of the first temperature or the second temperature. 12. The processing method of claim 10 , further comprising loading at least one wafer onto the substrate support surface. 13. The processing method of claim 12 , further comprising controlling a temperature skew of the at least one wafer. 14. A processing chamber comprising: a thermal processing station comprising a thermal showerhead having a first face, a first emissivity and a first temperature; a plasma processing station comprising a plasma showerhead having a second face, a second emissivity and a second temperature; a substrate support assembly comprising a plurality of substantially coplanar support surfaces having at least one wafer thereon, the substrate support assembly configured to move the at least one wafer between the thermal processing station and the plasma processing station; and a controller connected to the plurality of substantially coplanar support surfaces, wherein the first face is spaced in a range of about 0.5 mm to about 3 mm from the at least one wafer and the second face is spaced in a range of about 7 mm to about 15 mm from the at least one wafer, and the first emissivity is lower than the second emissivity and/or the first temperature is greater than the second temperature. 15. The processing chamber of claim 14 , wherein a temperature skew of less than about 0.5° C. is developed upon moving a wafer between the first processing station and the second processing station in about 0.5 seconds. 16. The processing chamber of claim 14 , wherein the first face is spaced about 2 mm from the at least one wafer and the second face is spaced in about 15 mm from the at least one wafer.

Assignees

Inventors

Classifications

  • characterised by supporting two or more semiconductor substrates · CPC title

  • characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating carrousel · CPC title

  • Temperature monitoring · CPC title

  • surrounding a central transfer chamber · CPC title

  • Apparatus for sealing, encapsulating, glassing, decapsulating or the like · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10787739B2 cover?
Apparatus and methods to process one or more wafers are described. A processing chamber comprises a first processing station comprising a first gas injector having a first face, a first emissivity and a first temperature, a second processing station comprising a second gas injector having a second face, a second emissivity and a second temperature, and a substrate support assembly comprising a …
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H10P14/6339. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 29 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).