Semiconductor storage device

Patent metadata

Field	Value
Publication number	US-10707307-B2
Application number	US-201916286162-A
Country	US
Kind code	B2
Filing date	Feb 26, 2019
Priority date	Sep 4, 2018
Publication date	Jul 7, 2020
Grant date	Jul 7, 2020

Abstract

A semiconductor storage device includes a substrate, a plurality of first gate electrodes on the substrate and arranged in a thickness direction of the substrate, and a first semiconductor pillar extending in the thickness direction of the substrate through the plurality of first gate electrodes, the first semiconductor pillar including a first portion facing the plurality of first gate electrodes and a second portion farther from the substrate than the first portion. The semiconductor storage device also includes a second gate electrode on the substrate farther from the substrate than the plurality of first gate electrodes, and a second semiconductor pillar extending in the thickness direction of the substrate through the second gate electrode, and connected to the first semiconductor pillar at the second portion of the first semiconductor pillar. The second portion of the first semiconductor pillar contains carbon (C).

First claim

What is claimed is:

1. A semiconductor storage device comprising:
a substrate;
a plurality of first gate electrodes on the substrate and arranged in a thickness direction of the substrate;
a first semiconductor pillar extending in the thickness direction of the substrate through the plurality of first gate electrodes, the first semiconductor pillar including a first portion facing the plurality of first gate electrodes and a second portion farther from the substrate than the first portion;
a second gate electrode on the substrate farther from the substrate than the plurality of first gate electrodes; and
a second semiconductor pillar extending in the thickness direction of the substrate through the second gate electrode, and connected to the first semiconductor pillar at the second portion of the first semiconductor pillar,
wherein the second portion of the first semiconductor pillar contains carbon (C).

2. The semiconductor storage device according to claim 1 , wherein a concentration of carbon in the second portion of the first semiconductor pillar is higher than a concentration of carbon in the first portion of the first semiconductor pillar.

3. The semiconductor storage device according to claim 2 , wherein a concentration of carbon in the second portion of the first semiconductor pillar is higher than a concentration of carbon in the second semiconductor pillar.

4. The semiconductor storage device according to claim 1 , wherein a concentration of carbon in the second portion of the first semiconductor pillar is higher than a concentration of carbon in the second semiconductor pillar.

5. The semiconductor storage device according to claim 1 , wherein a concentration of carbon is maximum or local maximum at a position of the second portion between ends of the second portion in the thickness direction.

6. The semiconductor storage device according to claim 1 , wherein
the first and second semiconductor pillars each contain boron (B) or phosphorus (P), and
a concentration of boron or phosphorus in the second semiconductor pillar is higher than a concentration of boron or phosphorus in the first semiconductor pillar.

7. The semiconductor storage device according to claim 6 , wherein a concentration of boron or phosphorus in the second semiconductor pillar is maximum or local maximum at a position of the second semiconductor pillar between ends of the semiconductor pillar in the thickness direction.

8. The semiconductor storage device according to claim 1 , wherein a length of the second semiconductor pillar in the thickness direction is less than a length of the first semiconductor pillar in the thickness direction.

9. The semiconductor storage device according to claim 1 , wherein a maximum width of the second semiconductor pillar in a surface direction of the substrate is less than a minimum width of the first semiconductor pillar in the surface direction.

10. The semiconductor storage device according to claim 1 , wherein a width of the second semiconductor pillar in the surface direction at an end connected to the first semiconductor pillar is less than a width of the first semiconductor pillar in the surface direction at an end connected to the second semiconductor pillar.

11. The semiconductor storage device according to claim 1 , wherein a thickness of the second gate electrode is thicker than a thickness of each of the first gate electrodes.

12. The semiconductor storage device according to claim 1 , wherein the first semiconductor pillar includes, therein, a first dielectric region extending in the thickness direction, and the second semiconductor pillar includes, therein, a second dielectric region extending in the thickness direction.

13. The semiconductor storage device according to claim 12 , wherein a length of the second dielectric region in the thickness direction is less than a length of the first dielectric region in the thickness direction.

14. The semiconductor storage device according to claim 12 , wherein a maximum width of the second dielectric region in a surface direction of the substrate is less than a maximum width of the first semiconductor pillar in the surface direction.

15. A semiconductor storage device comprising:
a substrate;
a plurality of word line layers on the substrate and arranged in a thickness direction of the substrate;
a first semiconductor pillar extending in the thickness direction of the substrate through the plurality of word line layers, the first semiconductor pillar including a first portion facing the plurality of word line layers and a second portion farther from the substrate than the first portion;
a select gate line layer on the substrate farther from the substrate than the plurality of word line layers; and
a second semiconductor pillar extending in the thickness direction of the substrate through the select gate line layer, and connected to the first semiconductor pillar at the second portion of the first semiconductor pillar,
wherein the second portion of the first semiconductor pillar contains carbon (C).

16. The semiconductor storage device according to claim 15 , wherein a concentration of carbon in the second portion of the first semiconductor pillar is higher than a concentration of carbon in the first portion of the first semiconductor pillar.

17. The semiconductor storage device according to claim 16 , wherein a concentration of carbon in the second portion of the first semiconductor pillar is higher than a concentration of carbon in the second semiconductor pillar.

18. The semiconductor storage device according to claim 15 , wherein a concentration of carbon in the second portion of the first semiconductor pillar is higher than a concentration of carbon in the second semiconductor pillar.

19. The semiconductor storage device according to claim 15 , wherein a concentration of carbon is maximum or local maximum at a position of the second portion between ends of the second portion in the thickness direction.

20. The semiconductor storage device according to claim 15 , wherein
the first and second semiconductor pillars each contain boron (B) or phosphorus (P), and
a concentration of boron or phosphorus in the second semiconductor pillar is higher than a concentration of boron or phosphorus in the first semiconductor pillar.

Assignees

• Toshiba Memory Corp

Inventors

• Sato Hiroyasu

Classifications

• H10D62/834

  further characterised by the dopants · CPC title

• H10D62/292 Primary

  Non-planar channels of IGFETs (resulting from the gate electrode dispositions, e.g. within trenches H10D64/512) · CPC title

• H10B43/40

  characterised by the peripheral circuit region · CPC title

• H10B41/27

  the channels comprising vertical portions, e.g. U-shaped channels · CPC title

• H10B41/41

  of a memory region comprising a cell select transistor, e.g. NAND · CPC title