Void control of confined phase change memory

Patent metadata

Field	Value
Publication number	US-10692574-B2
Application number	US-201916290353-A
Country	US
Kind code	B2
Filing date	Mar 1, 2019
Priority date	Mar 27, 2018
Publication date	Jun 23, 2020
Grant date	Jun 23, 2020

Abstract

Techniques for void reduction in phase change memory (PCM) devices are provided. In one embodiment, the system is provided that comprises a PCM device comprising a first electrode and a second electrode. The system can further comprise a first connector coupled to the first electrode and that applies a negative voltage to the first electrode, and a second connector coupled to the second electrode and that applies a ground voltage to the second electrode, wherein applying the negative voltage to the first electrode and applying the ground voltage to the second electrode comprises negatively biasing the PCM device. The system can further comprise the first connector applying the positive voltage to the first electrode, and the second connector applying a ground voltage to the second electrode, wherein applying the positive voltage to the first electrode and applying the ground voltage to the second electrode comprises positively biasing the PCM device.

First claim

What is claimed is:

1. A method, comprising:
forming a phase change memory (PCM) device, the PCM device comprising a first electrode and a second electrode;
applying a positive voltage to the first electrode; and
applying a ground voltage to the second electrode, wherein applying the positive voltage and applying the ground voltage comprises positively biasing the PCM device.

2. The method of claim 1 , wherein forming the PCM device further comprises:
arranging a metallic liner between the first electrode and the second electrode.

3. The method of claim 2 , wherein the metallic liner has a constant electrical resistance.

4. The method of claim 2 , further comprising:
coupling a dielectric to an exterior surface of the metallic liner.

5. The method of claim 1 , wherein PCM device comprises a phase change material.

6. The method of claim 5 , wherein the phase change material has a variable electrical resistance.

7. The method of claim 1 , wherein positively biasing the PCM device is performed in response to determining that a void is present at or within the defined distance of the second electrode and based on reduction or elimination of the void.

8. The method of claim 1 , further comprising:
heating a portion of the GST compound by positively biasing the PCM device or by negatively biasing the PCM device.

Assignees

• IBM

Inventors

• Kim Wanki
• Lam Chung Hon
• Zhu Yu
• Xie Yujun

Classifications

• H10P74/23

  characterised by multiple measurements, corrections, marking or sorting processes · CPC title

• G11C2013/0083

  Write to perform initialising, forming process, electro forming or conditioning · CPC title

• H10N70/231

  based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect · CPC title

• H10N70/041

  Modification of switching materials after formation, e.g. doping (shaping H10N70/061) · CPC title

• H10N70/8265

  on sidewalls of dielectric structures, e.g. mesa-shaped or cup-shaped devices · CPC title