Mitigating asymmetric transient errors in non-volatile memory by proactive data relocation

Patent metadata

Field	Value
Publication number	US-10656847-B2
Application number	US-201815976586-A
Country	US
Kind code	B2
Filing date	May 10, 2018
Priority date	May 10, 2018
Publication date	May 19, 2020
Grant date	May 19, 2020

Abstract

A controller performs background reads of multiple physical pages of a selected physical block of a non-volatile memory. The controller detects asymmetric transient errors in a physical page among the multiple physical pages based on a bit error rate (BER) observed in the background read of the physical page. In response to detecting the asymmetric transient errors, the controller mitigates the detected asymmetric transient errors by relocating valid logical pages of data from the physical page to another physical block of the non-volatile memory and by retaining valid logical pages of data programmed into other physical pages of the selected physical block.

First claim

What is claimed is:

1. A method of mitigating asymmetric errors in a non-volatile memory having an associated controller, the method comprising:
performing, by the controller, background reads of multiple physical pages of a selected physical block of the non-volatile memory;
detecting, by the controller, asymmetric transient errors in an affected physical page among the multiple physical pages based on an elevated bit error rate (BER) observed in the background read of the affected physical page that is in excess of a selected BER; and
in response to detecting the asymmetric transient errors in the affected physical page, mitigating, by the controller, the detected asymmetric transient errors by relocating first valid logical pages of data from the affected physical page to another physical block of the non-volatile memory different than the selected physical block and by retaining second valid logical pages of data programmed into physical pages of the selected physical block different than the affected physical page.

2. The method of claim 1 , wherein the detecting comprises detecting the asymmetric transient error by reference to an error count margin.

3. The method of claim 2 , wherein the error count margin comprises a threshold BER for a maximum rated data retention period of the non-volatile memory.

4. The method of claim 2 , wherein the error count margin comprises a threshold BER based on a current data retention period of the selected physical block.

5. The method of claim 1 , wherein:
the selected physical block comprises a plurality of page groups each including different ones of a plurality of physical pages in the selected physical block; and
the detecting comprises detecting asymmetric transient errors in the affected physical page by reference to a BER of another page in one of the plurality of page groups including the affected physical page.

6. The method of claim 1 , wherein the detecting comprises detecting the asymmetric transient errors in the affected physical page by reference to characterization data for the non-volatile memory.

7. A data storage system, comprising:
a controller for a non-volatile memory, wherein the controller is configured to perform:
performing background reads of multiple physical pages of a selected physical block of the non-volatile memory;
detecting asymmetric transient errors in an affected physical page among the multiple physical pages based on an elevated bit error rate (BER) observed in the background read of the affected physical page that is in excess of a selected BER; and
in response to detecting the asymmetric transient errors in the affected physical page, mitigating the detected asymmetric transient errors by relocating first valid logical pages of data from the affected physical page to another physical block of the non-volatile memory different than the selected physical block and by retaining second valid logical pages of data programmed into physical pages of the selected physical block different than the affected physical page.

8. The data storage system of claim 7 , wherein the detecting comprises detecting the asymmetric transient error by reference to an error count margin.

9. The data storage system of claim 8 , wherein the error count margin comprises a threshold BER for a maximum rated data retention period of the non-volatile memory.

10. The data storage system of claim 8 , wherein the error count margin comprises a threshold BER based on for a current data retention period of the selected physical block.

11. The data storage system of claim 7 , wherein:
the selected physical block comprises a plurality of page groups each including different ones of a plurality of physical pages in the selected physical block; and
the detecting comprises detecting asymmetric transient errors in the affected physical page by reference to a BER of another page in one of the plurality of page groups including the affected physical page.

12. The data storage system of claim 7 , wherein the detecting comprises detecting the asymmetric transient errors in the affected physical page by reference to characterization data for the non-volatile memory.

13. The data storage system of claim 7 , and further comprising the non-volatile memory.

14. A computer program product, the computer program product comprising:
a computer readable storage device having program instructions embodied therewith, the program instructions being executable by a controller of a non-volatile memory to cause the controller to perform:
performing background reads of multiple physical pages of a selected physical block of the non-volatile memory;
detecting asymmetric transient errors in an affected physical page among the multiple physical pages based on an elevated bit error rate (BER) observed in the background read of the affected physical page that is in excess of a selected BER; and
in response to detecting the asymmetric transient errors in the affected physical page, mitigating the detected asymmetric transient errors by relocating first valid logical pages of data from the affected physical page to another physical block of the non-volatile memory different than the selected physical block and by retaining second valid logical pages of data programmed into other physical pages of the selected physical block different than the affected physical page.

15. The program product of claim 14 , wherein the detecting comprises detecting the asymmetric transient error by reference to an error count margin.

16. The program product of claim 15 , wherein the error count margin comprises a threshold BER for a maximum rated data retention period of the non-volatile memory.

17. The program product of claim 15 , wherein the error count margin comprises a threshold BER based on a current data retention period of the selected physical block.

18. The program product of claim 14 , wherein:
the selected physical block comprises a plurality of page groups each including different ones of a plurality of physical pages in the selected physical block; and
the detecting comprises detecting asymmetric transient errors in the affected physical page by reference to a BER of another page in one of the plurality of page groups including the affected physical page.

19. The program product of claim 14 , wherein the detecting comprises detecting the asymmetric transient errors in the affected physical page by reference to characterization data for the non-volatile memory.

Assignees

• IBM

Inventors

• Pletka Roman A
• Papandreou Nikolaos
• Tomic Sasa
• Ioannou Nikolas
• Fry Aaron D
• Fisher Timothy

Classifications

• G06F12/0246

  in block erasable memory, e.g. flash memory · CPC title

• G11C29/52

  Protection of memory contents; Detection of errors in memory contents · CPC title

• G11C2029/0409

  Online test · CPC title

• G06F3/064

  Management of blocks · CPC title

• G06F3/0647

  Migration mechanisms · CPC title