Internally-shielded microelectronic packages and methods for the fabrication thereof

Patent metadata

Field	Value
Publication number	US-10629518-B2
Application number	US-201816116686-A
Country	US
Kind code	B2
Filing date	Aug 29, 2018
Priority date	Aug 29, 2018
Publication date	Apr 21, 2020
Grant date	Apr 21, 2020

Abstract

Internally-shielded microelectronic packages having increased resistances to electromagnetic cross-coupling are disclosed, as are methods for fabricating such microelectronic packages. In embodiments, the internally-shielded microelectronic package includes a substrate having a frontside and a longitudinal axis. A first microelectronic device is mounted to the frontside of the substrate, while a second microelectronic device is further mounted to the frontside of the substrate and spaced from the first microelectronic device along the longitudinal axis. An internal shield structure includes or consists of a shield wall, which is positioned between the first and second microelectronic devices as taken along the longitudinal axis. The internal shield structure is at least partially composed of a magnetically-permeable material, which decreases electromagnetic cross-coupling between the first and second microelectronic devices during operation of the internally-shielded microelectronic package.

First claim

What is claimed is:

1. An internally-shielded microelectronic package, comprising:
a substrate having a frontside and a longitudinal axis;
a first microelectronic device mounted to the frontside of the substrate;
a second microelectronic device further mounted to the frontside of the substrate and spaced from the first microelectronic device along the longitudinal axis; and
an internal shield structure comprising a shield wall positioned between the first and second microelectronic devices as taken along the longitudinal axis, the internal shield structure at least partially composed of a magnetically-permeable material decreasing electromagnetic cross-coupling between the first and second microelectronic devices during operation of the internally-shielded microelectronic package, the internal shield structure comprising:
an electrical shield layer; and
a magnetic shield layer having a magnetically permeability greater than that of the electrical shield layer and having an electrically conductivity less than that of the electrical shield layer.

2. The internally-shielded microelectronic package of claim 1 wherein the substrate comprises a base flange contacted by the internal shield structure.

3. The internally-shielded microelectronic package of claim 2 wherein the internal shield structure is further composed of an electrically-conductive material coupled to electrical ground through the base flange.

4. The internally-shielded microelectronic package of claim 1 wherein one of the magnetic shield layer and the electrical shield layer is plated onto the other of the magnetic shied layer and the electrical shield layer.

5. The internally-shielded microelectronic package of claim 1 further comprising:
a first pair of package leads to which the first microelectronic device is electrically coupled; and
a second pair of package leads to which the second microelectronic device is electrically coupled;
wherein the first pair of package leads, the second pair of package leads, and the internal shield structure comprise singulated pieces of a leadframe.

6. The internally-shielded microelectronic package of claim 1 wherein the first microelectronic device has a first height as taken along an axis orthogonal to the frontside of the substrate, wherein the second microelectronic device has a second height as taken along the axis, and wherein the internal shield structure comprises a shield wall having a height exceeding the first and second heights.

7. The internally-shielded microelectronic package of claim 1 further comprising:
a package body; and
a bond pad shelf extending around an inner periphery of the package body, the internal shield structure extending between opposing edges of the bond pad shelf.

8. The internally-shielded microelectronic package of claim 7 wherein the bond pad shelf has a first width and the internal shield structure has a second width as taken along an axis orthogonal to the longitudinal axis, the second width equal to or greater than one half the first width.

9. The internally-shielded microelectronic package of claim 1 further comprising:
a package body at least partially defined by the substrate; and
a cover piece bonded to the package body and to which the internal shield structure is attached.

10. An internally-shielded microelectronic package, comprising:
a substrate having a frontside and a longitudinal axis;
a first microelectronic device mounted to the frontside of the substrate;
a second microelectronic device further mounted to the frontside of the substrate and spaced from the first microelectronic device along the longitudinal axis;
an internal shield structure comprising a shield wall positioned between the first and second microelectronic devices as taken along the longitudinal axis, the internal shield structure at least partially composed of a magnetically-permeable material decreasing electromagnetic cross-coupling between the first and second microelectronic devices during a package body at least partially defined by the substrate; and
a cover piece bonded to the package body and to which the internal shield structure is attached, at least a portion of the internal shield structure integrally formed with the cover piece.

11. The internally-shielded microelectronic package of claim 1 further comprising an open trench formed in the frontside of the substrate, the internal shield structure having a lower edge portion received in the open trench.

12. The internally-shielded microelectronic package of claim 1 further comprising:
a first lead;
a first bondwire array electrically interconnecting the first microelectronic device with the first lead;
a second lead spaced from the first lead as taken the longitudinal axis; and
a second bondwire array electrically interconnecting the second microelectronic device with the second lead, a portion of the internal shield structure further located between first bondwire array and the second bondwire array as taken along the longitudinal axis.

13. The internally-shielded microelectronic package of claim 1 wherein the first microelectronic device comprises a first transistor die, wherein the second microelectronic device comprises a second transistor die, and wherein the first and second transistor die comprise radio frequency power amplification circuitry.

14. The internally-shielded microelectronic package of claim 1 further comprising:
a package body containing the first microelectronic device and the second microelectronic device; and
first and second package leads extending from a side of the package body, the first and second package leads electrically coupled to the first microelectronic device and to the second microelectronic device, respectively;
wherein the internal shield structure further comprises a shield extension projecting from the package body and extending between the first and second package leads.

15. An internally-shielded microelectronic package, comprising:
a first microelectronic device;
a second microelectronic device;
a package body containing the first and second microelectronic devices; and
an internal shield structure comprising a shield wall located within the package body and positioned between the first and second microelectronic devices, the shield wall comprising:
a magnetically-permeable portion having a first magnetic permeability and a first electrical conductivity; and
an electrically-conductive portion bonded to the magnetically-permeable layer, the electrically-conductive portion having a second magnetic permeability less than the first magnetic permeability and having a second electrical conductivity greater than the first electrical conductivity.

16. The internally-shielded microelectronic package of claim 15 wherein the magnetically-permeable portion comprises a singulated piece of a leadframe, and wherein the electrically-conductive portion comprises an electrically-conductive layer deposited over the singulated piece of the leadframe.

17. The internally-shielded microelectronic package of claim 15 further comprising a leadframe including a wall section bent into a generally upright position, the wall section at least partly defining the magnetically-permeable portion of the internal shield structure.

18. The internally-shielded microelectronic package of claim 15 further comprising a leadframe including a wall section bent into a generally upright position, the wall section at least partly defining the electrically-conductive portion of the internal shield structure.

1

Assignees

• Nxp Usa Inc

Inventors

• Sanchez Audel
• Viswanathan Lakshminarayan
• Shilimkar Vikas
• Srinidhi Embar Ramanujam

Classifications

• H03F1/0288

  using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers · CPC title

• H03F3/195

  in integrated circuits · CPC title

• H01L21/565

  Electricity · mapped topic

• H01L23/49548

  Electricity · mapped topic

• H01L2224/48247

  Electricity · mapped topic