Planar photonic switch fabrics with reduced waveguide crossings

Patent metadata

Field	Value
Publication number	US-10616670-B2
Application number	US-201916453257-A
Country	US
Kind code	B2
Filing date	Jun 26, 2019
Priority date	Dec 12, 2017
Publication date	Apr 7, 2020
Grant date	Apr 7, 2020

Abstract

Techniques for using planar photonic switch fabrics with reduced waveguide crossings are described. In one embodiment, a system is provided that comprises a memory that stores computer-executable components and a processor that executes computer-executable components stored in the memory. In one implementation, the computer-executable components comprise an arrangement component that arranges a first planar switch fabric topology. The computer-executable components further comprise a transformation component that interleaves a plurality of inputs of the first planar switch fabric topology and a plurality of outputs of the first planar switch fabric topology to form a second planar switch fabric topology, the second planar switch fabric topology having a lower number of waveguide crossings than the first planar switch fabric topology.

First claim

What is claimed is:

1. A system, comprising:
a processor that:
arranges a first planar switch fabric topology with a defined amount of waveguides between a plurality of inputs of the first planar switch fabric topology and a plurality of outputs of the first planar switch fabric topology; and
routes a first waveguide of the first planar switch fabric topology around a perimeter of a first input/output (I/O) stage of the first planar switch fabric topology to produce a second planar switch fabric topology, the first I/O stage being located on an interior of the second planar switch fabric topology, the second planar switch fabric topology having a lower number of waveguide crossings of the waveguides than the first planar switch fabric topology, wherein the second planar switch fabric topology has the defined amount of waveguides, and wherein a signal, input, or light wave is injected into the first I/O stage of the second planar switch fabric topology using an out of plane coupling structure.

2. The system of claim 1 , wherein the first I/O stage comprises an input stage or an output stage.

3. The system of claim 1 , wherein a first layer of a second planar switch fabric topology is fabricated in a first material, and a second layer of the second planar switch fabric topology is fabricated in a second material that is different from the first material.

4. The system of claim 3 , wherein the second layer of the second planar switch fabric topology comprises a second waveguide that is fabricated in silicon nitride.

5. The system of claim 1 , wherein the out of plane coupling structure comprises a grating coupler.

6. A computer-implemented method, comprising:
arranging, by a system operatively coupled to a processor, a first planar switch fabric topology with a defined amount of waveguides between a plurality of inputs of the first planar switch fabric topology and a plurality of outputs of the first planar switch fabric topology;
routing, by the system, a first waveguide of the first planar switch fabric topology around a perimeter of a first input/output (I/O) stage of the first planar switch fabric topology to produce a second planar switch fabric topology, the first I/O stage being located on an interior of the second planar switch fabric topology, the second planar switch fabric topology having a lower number of waveguide crossings of the waveguides than the first planar switch fabric topology, wherein the second planar switch fabric topology has the defined amount of waveguides; and
injecting, by the system, a signal, an input or a light wave into the first I/O stage of the second planar switch fabric topology using an out of plane coupling structure.

7. The computer-implemented method of claim 6 , wherein the first I/O stage comprises an input stage or an output stage.

8. The computer-implemented method of claim 6 , further comprising:
injecting, by the system, the signal, the input or the light wave into the first I/O stage of a back side of the second planar switch fabric topology.

9. The computer-implemented method of claim 6 , wherein the out of plane coupling structure comprises an angled reflective surface.

10. The computer-implemented method of claim 6 , wherein the second planar switch fabric topology comprises a data transmitting optical emitter that is integrated within an interior of the second planar switch fabric topology.

11. A computer program product that facilitates implementation of planar photonic switch fabrics with reduced waveguide crossings, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions being executable by a processor to cause the processor to:
arrange a first planar switch fabric topology with a defined amount of waveguides between a plurality of inputs of the first planar switch fabric topology and a plurality of outputs of the first planar switch fabric topology; and
route a first waveguide of the first planar switch fabric topology around a perimeter of a first input/output (I/O) stage of the first planar switch fabric topology to produce a second planar switch fabric topology, the first I/O stage being located on an interior of the second planar switch fabric topology, the second planar switch fabric topology having a lower number of waveguide crossings of the waveguides than the first planar switch fabric topology, wherein the second planar switch fabric topology has the defined amount of waveguides, and wherein a signal, an input or a light wave is injected into the first I/O stage of the second planar switch fabric topology using an out of plane coupling structure.

12. The computer program product of claim 11 , wherein the first I/O stage comprises an input stage or an output stage.

13. The computer program product of claim 11 , wherein the second planar switch fabric topology comprises a data receiving optical detector that is integrated within an interior of the second planar switch fabric topology.

14. The computer program product of claim 1 , wherein the out of plane coupling structure comprises a grating coupler.

Assignees

• IBM

Inventors

• Dupuis Nicolas
• Lee Benjamin

Classifications

• H04Q11/0005 Primary

  Switch and router aspects · CPC title

• H04Q2011/0022

  using fibre gratings · CPC title

• H04Q2011/0058

  Crossbar; Matrix · CPC title

• G02B6/3596

  With planar waveguide arrangement, i.e. in a substrate, regardless if actuating mechanism is outside the substrate · CPC title

• G02B6/356

  in an optical cross-connect device, e.g. routing and switching aspects of interconnecting different paths propagating different wavelengths to (re)configure the various input and output links (switching polarized beams G02B6/3594; power equalizers G02B6/356 and G02B6/3594; path selecting means H04Q11/0001) · CPC title