Semiconductor devices having a plurality of unit cell transistors that have smoothed turn-on behavior and improved linearity

US10615273B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10615273-B2
Application numberUS-201715628932-A
CountryUS
Kind codeB2
Filing dateJun 21, 2017
Priority dateJun 21, 2017
Publication dateApr 7, 2020
Grant dateApr 7, 2020

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Abstract

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A semiconductor device includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each unit cell transistor including a respective gate finger. Respective threshold voltages of first and second of the unit cell transistors differ by at least 0.1 volts and/or threshold voltages of first and second segments of a third of the unit cell transistors differ by at least 0.1 volts.

First claim

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What is claimed is: 1. A method comprising: providing a gallium nitride based high electron mobility transistor (“HEMT”) device that includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each of the unit cell transistors includes a respective gate finger, wherein different portions of the gallium nitride based HEMT device have different respective threshold voltages; applying one or more voltage signals to the respective gate fingers of the unit cell transistors in order to turn on different portions of the gallium nitride based HEMT device at respective different levels of current flow, wherein a peak third order transconductance of the gallium nitride based HEMT device is at least 30% less than a peak third order transconductance of an equivalent device having a uniform threshold voltage. 2. The method of claim 1 , wherein first and second segments of at least some of the gate fingers have threshold voltages that differ by at least 0.1 volts. 3. The method of claim 1 , wherein different ones of the unit cell transistors have threshold voltages that differ by at least 0.1 volts. 4. The method of claim 3 , wherein the unit cell transistors are divided into a plurality of groups, each of the groups includes at least five unit cell transistors, and wherein the unit cell transistors within each of the groups have substantially constant threshold voltages that are within 0.01 volts of each other. 5. The method of claim 4 , wherein each of the groups includes approximately the same number of unit cell transistors. 6. The method of claim 4 , wherein the plurality of groups is at least three groups. 7. The method of claim 4 , wherein the threshold voltages of the unit cell transistors in different ones of the groups differ by at least 0.1 volts and by no more than 0.8 volts. 8. The method of claim 1 , wherein two of the different portions of the gallium nitride based HEMT device have levels of current flow in respective two dimensional electron gas channels that differ by at least 10%. 9. The method of claim 1 , wherein two of the different portions of the gallium nitride based HEMT device have levels of current flow that differ by between 10-30%. 10. A method comprising: providing a semiconductor device that includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each of the unit cell transistors includes a respective gate finger, wherein a first portion of the semiconductor device has a first threshold voltage and a second portion of the semiconductor device has a second threshold voltage that differs from the first threshold voltage by 0.1 to 0.8 volts; and applying one or more voltage signals to the respective gate fingers of the unit cell transistors in order to turn on different portions of the semiconductor device at respective different levels of current flow, wherein the semiconductor structure includes a gallium nitride based channel layer and a gallium nitride based barrier layer on the gallium nitride based channel layer, and wherein the gate fingers extend in parallel to one another. 11. The method of claim 1 , wherein first and second segments of at least some of the gate fingers have threshold voltages that differ by at least 0.25 volts. 12. The method of claim 1 , wherein a first of the unit cell transistors has a threshold voltage that differs by at least 0.25 volts from a threshold voltage of a second of the unit cell transistors. 13. The method of claim 10 , wherein percentages of the device that have the respective first and second threshold voltages are selected to reduce a peak third order transconductance of the semiconductor device by at least 30%. 14. The method of claim 10 , wherein first and second segments of at least some of the gate fingers have threshold voltages that differ by at least 0.25 volts, and wherein portions of at least one of the gallium nitride based channel layer and the gallium nitride based barrier layer are doped differently to vary the threshold voltages of the first and second segments of the at least some of the gate fingers. 15. The method of claim 10 , wherein different portions of the gallium nitride based barrier layer have different material compositions. 16. A method of operating a gallium nitride based high electron mobility transistor (“HEMT”) having a channel layer and a barrier layer on the channel layer, the method comprising: providing a plurality of unit cell transistors that are electrically connected in parallel on a semiconductor structure to provide the gallium nitride based HEMT, wherein the gallium nitride based HEMT is configured so that different unit cell transistors or different portions of the same unit cell transistor will exhibit different levels of current flow during turn-on in response to a simultaneous application of one or more voltage signals to the unit cell transistors and so that a third order transconductance of the gallium nitride based HEMT will exhibit multiple positive peaks, wherein a first portion of the gallium nitride based HEMT has a first threshold voltage and a second portion of the gallium nitride based HEMT has a second threshold voltage that differs from the first threshold voltage by 0.1 to 0.8 volts. 17. The method of claim 16 , wherein the barrier layer comprises an Al x Ga 1-x N barrier layer, and wherein the value of x differs under different portions of the gallium nitride based HEMT. 18. A method, comprising: providing a gallium nitride based high electron mobility transistor (“HEMT”) device that includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each of the unit cell transistors includes a respective gate finger; applying one or more voltage signals to the respective gate fingers of the unit cell transistors in order to turn on different portions of the gallium nitride based HEMT device at respective different levels of current flow, wherein each of the unit cell transistors has a respective threshold voltage along the width of its respective gate finger, wherein the gate fingers of the unit cell transistors are divided into a plurality of groups, wherein the threshold voltages of unit cell transistors corresponding to gate fingers in different ones of the groups vary by at least 0.1 volts and by no more than 0.8 volts. 19. The method of claim 18 , wherein the threshold voltages of the unit cell transistors corresponding to the gate fingers within each of the respective groups are within 0.025 volts of each other.

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What does patent US10615273B2 cover?
A semiconductor device includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each unit cell transistor including a respective gate finger. Respective threshold voltages of first and second of the unit cell transistors differ by at least 0.1 volts and/or threshold voltages of first and second segments …
Who is the assignee on this patent?
Cree Inc
What technology area does this patent fall under?
Primary CPC classification H01L29/7787. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 07 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).