High electron mobility transistor structure

Patent metadata

Field	Value
Publication number	US-10103239-B1
Application number	US-201715856443-A
Country	US
Kind code	B1
Filing date	Dec 28, 2017
Priority date	Dec 28, 2017
Publication date	Oct 16, 2018
Grant date	Oct 16, 2018

Abstract

A high electron mobility transistor (HEMT) structure including a substrate, a barrier layer, a buffer layer, a source, a drain, a multi-gate structure, and a multi-field plate structure is provided. The barrier layer is disposed over the substrate. The buffer layer is disposed between the substrate and the barrier layer, and includes a channel region adjacent to an interface between the barrier layer and the buffer layer. The source and the drain are disposed on the barrier layer. The multi-gate structure is disposed between the source and the drain, and includes first conductive finger portions spaced apart from each other. The multi-field plate structure is disposed between the multi-gate structure and the drain, and includes second conductive finger portions spaced apart from each other. The first conductive finger portions and the second conductive finger portions are in an alternate and parallel arrangement.

First claim

What is claimed is:

1. A high electron mobility transistor (HEMT) structure, comprising:
a substrate;
a barrier layer disposed over the substrate;
a buffer layer disposed between the substrate and the barrier layer and having a channel region adjacent to an interface between the barrier layer and the buffer layer;
a source and a drain disposed over the barrier layer;
a multi-gate structure disposed between the source and the drain and comprising a plurality of first conductive finger portions separated from each other; and
a multi-field plate structure disposed between the multi-gate structure and the drain and comprising a plurality of second conductive finger portions separated from each other, wherein the plurality of first conductive finger portions and the plurality of second conductive finger portions are in an alternate and parallel arrangement;
wherein the multi-field plate structure further comprises a connection portion that connects an end of the plurality of second conductive finger portions, respectively.

2. The HEMT structure as claimed in claim 1 , wherein the plurality of first conductive finger portions has a respective width to define a corresponding channel length and wherein all the channel lengths are different from each other.

3. The HEMT structure as claimed in claim 1 , wherein the plurality of first conductive finger portions has a respective width to define a corresponding channel length and wherein all the channel lengths are the same as each other.

4. The HEMT structure as claimed in claim 1 , wherein the plurality of first conductive finger portions has a respective width to define a corresponding channel length and wherein some of the channel lengths are the same as each other.

5. The HEMT structure as claimed in claim 1 , wherein a portion of the multi-gate structure extends into the barrier layer.

6. The HEMT structure as claimed in claim 1 , wherein the multi-gate structure is in direct contact with the barrier layer.

7. The HEMT structure as claimed in claim 1 , wherein the substrate comprises a silicon substrate, a silicon carbide substrate, or a sapphire substrate.

8. The HEMT structure as claimed in claim 1 , wherein the barrier layer comprises InAlGaN, AlGaN, InGaN, GaN, or a combination thereof.

9. The HEMT structure as claimed in claim 1 , wherein the barrier layer comprises InAlGaN, AlGaN, InGaN, GaN, AlN, or a combination thereof.

10. The HEMT structure as claimed in claim 1 , wherein the source and the drain comprises Ti, Al, Ni, Mo, Au, or an alloy thereof.

11. The HEMT structure as claimed in claim 1 , wherein the multi-gate structure or the multi-field plate structure comprises Ti, Ni, Au, or an alloy thereof.

12. A high electron mobility transistor (HEMT) structure, comprising:
a substrate;
a barrier layer disposed over the substrate; a buffer layer disposed between the substrate and the barrier layer and having a channel region adjacent to an interface between the barrier layer and the buffer layer;
a source and a drain disposed over the barrier layer;
a multi-gate structure disposed between the source and the drain and comprising a plurality of first conductive finger portions over the barrier layer and separated from and parallel to each other;
an electrical connection structure electrically connected to at least two of the plurality of first conductive finger portions, wherein at least one of the plurality of first conductive finger portions is not electrically connected to the electrical connection structure;
a multifield plate disposed over the barrier layer between the multi-gate structure and the drain, comprising:
a plurality of second conductive finger portions, wherein the plurality of first conductive finger portions and the plurality of second conductive finger portions are in an alternate arrangement; and
a connection portion connected to an end of the plurality of second conductive finger portions, respectively.

13. The HEMT structure as claimed in claim 12 , wherein the plurality of first conductive finger portions has a respective width to define a corresponding channel length and wherein all the channel lengths are different from each other.

14. The HEMT structure as claimed in claim 12 , wherein the plurality of first conductive finger portions has a respective width to define a corresponding channel length and wherein all the channel lengths are the same as each other.

15. The HEMT structure as claimed in claim 1 , wherein a portion of the multi-gate structure extends into the barrier layer.

Assignees

• Vanguard Int Semiconduct Corp

Inventors

• Chou Yu-Chieh
• Lin Hsin-Chih

Classifications

• H01L29/66462 Primary

  Electricity · mapped topic

• H01L29/7786

  Electricity · mapped topic

• H01L29/205

  Electricity · mapped topic

• H01L29/2003

  Electricity · mapped topic

• H10D62/8503

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title