Formation of common interfacial layer on Si/SiGe dual channel complementary metal oxide semiconductor device

Patent metadata

Field	Value
Publication number	US-10615083-B2
Application number	US-201916266469-A
Country	US
Kind code	B2
Filing date	Feb 4, 2019
Priority date	Jan 23, 2017
Publication date	Apr 7, 2020
Grant date	Apr 7, 2020

Abstract

A method is presented for forming a semiconductor structure. The method includes forming a silicon (Si) channel for a first device, forming a first interfacial layer over the Si channel, forming a silicon-germanium (SiGe) channel for a second device, forming a second interfacial layer over the SiGe channel, and selectively removing germanium oxide (GeOX) from the second interfacial layer by applying a combination of hydrogen (H2) and hydrogen chloride (HCl). The second interfacial is silicon germanium oxide (SiGeOX) and removal of the GeOX results in formation of a pure silicon dioxide (SiO2) layer.

First claim

What is claimed is:

1. A semiconductor structure comprising:
a first channel formed for a first device;
a first interfacial layer disposed over the first channel;
a second channel formed for a second device; and
a second interfacial layer disposed over the second channel;
wherein germanium oxide (GeO X ) is selectively removed from the second interfacial layer by applying a combination of gases to convert the first interfacial layer to have a same chemical compound as the second interfacial layer and a high-k metal gate is then disposed in direct contact with the converted first interfacial layer.

2. The structure of claim 1 , wherein the first device is an n-type field effect transistor (nFET).

3. The structure of claim 1 , wherein the second device is a p-type field effect transistor (pFET).

4. The structure of claim 1 , wherein the first channel is silicon (Si), the second channel is silicon germanium (SiGe), and the second interfacial is silicon germanium oxide (SiGeO X ).

5. The structure of claim 1 , wherein removal of the GeO X results in formation of a pure silicon dioxide (SiO 2 ) layer.

6. The structure of claim 1 , wherein the converted first interfacial layer is formed between spacers.

7. The structure of claim 6 , wherein the combination of gases are applied to sidewalls of the spacers before the converted first interfacial layer is formed.

8. The structure of claim 1 , wherein removal of the GeO X prevents breaking of Si—O bonds in the second interfacial layer.

9. The structure of claim 1 , wherein removal of the GeO X results in decreased interface trap density in the second interfacial and the second channel.

10. The structure of claim 1 , wherein the gases are a combination of hydrogen (H 2 ) and hydrogen chloride (HCl).

11. A semiconductor structure comprising:
a first channel formed for a first device;
a first interfacial layer disposed in direct contact with the first channel;
a second channel formed for a second device; and
a second interfacial layer disposed in direct contact with the second channel, the second interfacial layer constructed from a different material than the first interfacial layer;
wherein germanium oxide (GeO X ) is selectively removed from the second interfacial layer by applying a combination of gases to convert the first interfacial layer to have a same chemical compound as the second interfacial layer.

12. The structure of claim 11 , wherein a high-k metal gate is disposed in direct contact with the converted first interfacial layer.

13. The structure of claim 11 , wherein the first channel is silicon (Si), the second channel is silicon germanium (SiGe), and the second interfacial is silicon germanium oxide (SiGeO X ).

14. The structure of claim 11 , wherein removal of the GeO X results in formation of a pure silicon dioxide (SiO 2 ) layer.

15. The structure of claim 11 , wherein the converted first interfacial layer is formed between spacers.

16. The structure of claim 11 , wherein the combination of gases are applied to sidewalls of the spacers before the converted first interfacial layer is formed.

17. The structure of claim 11 , wherein removal of the GeO X prevents breaking of Si—O bonds in the second interfacial layer.

18. The structure of claim 11 , wherein removal of the GeO X results in decreased interface trap density in the second interfacial and the second channel.

19. The structure of claim 11 , wherein the gases are a combination of hydrogen (H 2 ) and hydrogen chloride (HCl).

20. The structure of claim 11 , wherein the first device is an n-type field effect transistor (nFET) and the second device is a p-type field effect transistor (pFET).

Assignees

• IBM

Inventors

• Bao Ruqiang
• Jagannathan Hemanth
• Lee Choonghyun
• Mochizuki Shogo

Classifications

• H10P50/285

  of materials not containing Si, e.g. PZT or Al2O3 · CPC title

• H01L21/823857 Primary

  Electricity · mapped topic

• H01L21/31122

  Electricity · mapped topic

• H01L27/092

  Electricity · mapped topic

• H01L21/823807

  Electricity · mapped topic