Signal processing device and method

Patent metadata

Field	Value
Publication number	US-10547323-B2
Application number	US-201716098652-A
Country	US
Kind code	B2
Filing date	Apr 25, 2017
Priority date	May 4, 2016
Publication date	Jan 28, 2020
Grant date	Jan 28, 2020

Abstract

A bitstream converter for converting a 1-bit pulse density modulated (PDM) bitstream signal into an analog audio signal, the bitstream converter comprising: a processor configured to process the 1-bit PDM bitstream signal using a return to zero clock having a frequency higher than a sampling frequency of the 1-bit PDM bitstream signal to output a corresponding 1-bit return to zero signal, wherein the processor is configured to process the 1-bit PDM signal to ensure a portion of each bit of the 1-bit PDM bitstream signal is zero for a duration which is based on the frequency of the return to zero clock; and signal processing means configured to extract the analog audio signal from the 1-bit return to zero signal by filtering the 1-bit return to zero signal.

First claim

The invention claimed is:

1. A bitstream converter for converting a 1-bit pulse density modulated (PDM) bitstream signal into an analog audio signal, the bitstream converter comprising:
a processor configured to process the 1-bit PDM bitstream signal using a return to zero clock having a frequency higher than a sampling frequency of the 1-bit PDM bitstream signal to output a corresponding 1-bit return to zero signal, wherein the processor is configured to process the 1-bit PDM signal to ensure a portion of each bit of the 1-bit PDM bitstream signal is zero for a duration which is based on the frequency of the return to zero clock; and
signal processing means configured to extract the analog audio signal from the 1-bit return to zero signal by filtering the 1-bit return to zero signal,
wherein the return to zero clock frequency is at least 4 times the sampling frequency of the 1-bit PDM bitstream signal.

2. A bitstream converter according to claim 1 , wherein the signal processing means includes one or more filters to filter the 1-bit return to zero signal.

3. A bitstream converter according to claim 1 , wherein the signal processing means includes one or more low-pass filters to filter the 1-bit return to zero signal.

4. A bitstream converter according to claim 1 , wherein the signal processing means is configured to extract the analog audio signal from the 1-bit return to zero signal by demodulating the 1-bit return to zero signal.

5. A bitstream converter according to claim 1 , wherein: the signal processing means includes a low-pass finite impulse response filter configured to filter noise resulting from the processing of the 1-bit PDM bitstream signal to output the corresponding 1-bit return to zero signal.

6. A bitstream converter according to claim 5 , wherein the low pass finite impulse response filter is configured to attenuate frequencies above 1 MHz by at least 30 dB.

7. A bitstream converter according to claim 5 , wherein the low-pass finite impulse response filter is a moving average finite impulse response filter.

8. A bitstream converter according to claim 7 , wherein the moving average finite impulse response filter has an order of at least 2.

9. A bitstream converter according to claim 1 , wherein the 1-bit return to zero signal is a 1-bit bipolar return to zero signal.

10. A bitstream converter according to claim 9 , wherein the processor outputs the 1-bit bipolar return to zero signal as a differential signal.

11. A bitstream converter according to claim 10 , wherein the processor outputs a 1-bit unipolar return to zero signal and a complimentary 1-bit unipolar return to zero signal to differentially output the 1-bit bipolar return to zero signal.

12. A bitstream converter according to claim 1 , further comprising an oversampling stage, the oversampling stage configurable to oversample an input bitstream signal to provide the 1-bit PDM bitstream signal.

13. A bitstream converter according to claim 12 , wherein the input bitstream signal is an input multi-bit bitstream signal, the oversampling stage configured to generate the 1-bit PDM bitstream signal from the input multi-bit bitstream signal.

14. A bitstream converter according to claim 12 , wherein the oversampling stage oversamples a sampling frequency of the input bitstream signal by a factor of at least 32.

15. A bitstream converter according to claim 1 , wherein the processor is a digital signal processor.

16. A digital-to-analog converter including the bitstream converter according to claim 1 .

17. A method of bitstream conversion for converting a 1-bit pulse density modulated (PDM) bitstream signal into an analog audio signal, the method of bitstream conversion comprising:
processing the 1-bit PDM bitstream signal using a return to zero clock having a frequency at least 4 times higher than a sampling frequency of the 1-bit PDM bitstream signal, to output a corresponding 1-bit return to zero signal, by processing the 1-bit PDM signal to ensure a portion of each bit of the 1-bit PDM signal is zero for a duration which is based on the frequency of the return to zero clock; and
extracting the analog audio signal from the 1-bit return to zero signal by signal processing means by filtering the 1-bit return to zero signal.

18. A method of bitstream conversion according to claim 17 , wherein filtering the 1-bit return to zero signal includes filtering the 1-bit return to zero signal with a finite impulse response filter to remove noise produced by processing the 1-bit PDM bitstream signal to provide the corresponding 1-bit return to zero signal.

19. A method of bitstream conversion according to claim 17 including oversampling an input bitstream signal to provide the 1-bit PDM bitstream signal.

20. An audio playback device comprising a bitstream converter according to claim 1 .

Assignees

• D & M Holdings Inc

Inventors

• Finck Rainer
• Kawahara Shozo

Classifications

• H03M3/502 Primary

  Details of the final digital/analogue conversion following the digital delta-sigma modulation · CPC title

• H03M1/66

  Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

• H03M3/504 Primary

  the final digital/analogue converter being constituted by a finite impulse response [FIR] filter, i.e. FIRDAC · CPC title

• H03M7/3008

  by averaging out the errors, e.g. using dither · CPC title

• H03M1/0863

  of switching transients, e.g. glitches · CPC title