Dual output charge pump

US10523115B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10523115-B2
Application numberUS-201816102654-A
CountryUS
Kind codeB2
Filing dateAug 13, 2018
Priority dateFeb 15, 2015
Publication dateDec 31, 2019
Grant dateDec 31, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

According to some implementation, a charge pump includes a boost charge pump circuit and a buck charge pump circuit sharing a common flying capacitance. In some implementations, the boost pump circuit includes an input node and a boosted-voltage output node, and the buck charge pump circuit includes the input node and a divided-voltage output node. In some implementations, the charge pump of claim 3 wherein the boosted-voltage includes 2×Vin, and the divided-voltage includes Vin/2, Vin being an input voltage at the input node. In some implementations, the boost pump circuit further includes a first holding capacitance that couples the boosted-voltage output node to a ground. In some implementations, the buck pump circuit further includes a second holding capacitance that couples the divided-voltage output node to the ground.

First claim

Opening claim text (preview).

What is claimed is: 1. A charge pump comprising a boost charge pump circuit including an input node and a boosted-voltage output node, and a buck charge pump circuit including the input node and a divided-voltage output node, the boost charge pump circuit and the buck charge pump circuit sharing a common flying capacitance, the common flying capacitance configured to undergo truncated charging to limit a ripple effect in a hysteretic feedback loop, the boost charge pump circuit and the buck charge pump circuit each including a plurality of switches implemented to incorporate the common flying capacitance and generate a boosted output voltage and a divided output voltage, respectively. 2. The charge pump of claim 1 wherein the plurality of switches includes a first switch (S 1 ) and a second switch (S 2 ) arranged in parallel between the input node and respective ends of the flying capacitance. 3. The charge pump of claim 2 wherein the plurality of switches includes a third switch (S 3 ) between a second end of the flying capacitance and a ground. 4. The charge pump of claim 3 wherein the plurality of switches includes a fourth switch (S 4 ) between a first end of the flying capacitance and the boosted-voltage output node. 5. The charge pump of claim 4 wherein the plurality of switches includes a fifth switch (S 5 ) between the first end of the flying capacitance and the divided-voltage output node. 6. The charge pump of claim 5 wherein the plurality of switches includes a sixth switch (S 6 ) between the second end of the flying capacitance and the divided-voltage output node. 7. The charge pump of claim 6 wherein the switches S 1 , S 2 , S 3 , S 4 , S 5 , and S 6 are configured to operate in four phases to yield the output voltages having magnitudes 2×Vin and Vin/2, Vin being an input voltage at the input node. 8. The charge pump of claim 7 wherein the first phase includes closed S 1 and S 6 and open S 2 to S 5 , the second phase includes closed S 3 and S 5 and open S 1 , S 2 , S 4 , and S 6 , the third phase includes closed S 1 and S 3 and open S 2 and S 4 to S 6 , and the fourth phase includes closed S 2 and S 4 and open S 1 , S 3 , S 5 , and S 6 . 9. The charge pump of claim 7 wherein the first phase includes closed S 1 and S 6 and open S 2 to S 5 , the second phase includes closed S 3 and S 5 and open S 1 , S 2 , S 4 , and S 6 , the third phase includes closed S 1 and S 6 and open S 2 to S 5 , and the fourth phase includes closed S 2 and S 4 and open S 1 , S 3 , S 5 , and S 6 . 10. The charge pump of claim 9 wherein the third phase includes partial charging of the flying capacitance to improve charge preservation. 11. The charge pump of claim 7 wherein the first phase includes closed S 1 and S 6 and open S 2 to S 5 , the second phase includes closed S 3 and S 5 and open S 1 , S 2 , S 4 , and S 6 , the third phase includes closed S 1 and S 6 and open S 2 to S 5 , and the fourth phase includes closed S 3 and S 5 and open S 1 , S 2 , S 4 , and S 6 . 12. The charge pump of claim 11 wherein the fourth phase includes truncated charging of the flying capacitance to limit the ripple effect in the hysteretic feedback loop. 13. The charge pump of claim 1 wherein the boost charge pump circuit includes a first holding capacitance that couples the boosted-voltage output node to a ground. 14. The charge pump of claim 13 wherein the buck charge pump circuit includes a second holding capacitance that couples the divided-voltage output node to the ground. 15. A voltage supply system comprising: a boost converter configured to generate a boosted voltage based on an input voltage; and a charge pump having a boost charge pump circuit including an input node and a boosted-voltage output node, and a buck charge pump circuit including the input node and a divided-voltage output node, the boost charge pump circuit and the buck charge pump circuit sharing a common flying capacitance, the common flying capacitance configured to undergo truncated charging to limit a ripple effect in a hysteretic feedback loop, the boost charge pump circuit and the buck charge pump circuit each including a plurality of switches implemented to incorporate the common flying capacitance and generate a boosted output voltage and a divided output voltage, respectively. 16. The voltage supply system of claim 15 wherein the plurality of switches includes a first switch (S 1 ) and a second switch (S 2 ) arranged in parallel between the input node and respective ends of the flying capacitance, a third switch (S 3 ) between a second end of the flying capacitance and a ground, a fourth switch (S 4 ) between a first end of the flying capacitance and the boosted-voltage output node, a fifth switch (S 5 ) between the first end of the flying capacitance and the divided-voltage output node, and a sixth switch (S 6 ) between the second end of the flying capacitance and the divided-voltage output node. 17. The voltage supply system of claim 16 wherein switches S 1 , S 2 , S 3 , S 4 , S 5 , and S 6 are configured to operate in four phases to yield output voltages having magnitudes 2×Vin and Vin/2, Vin being an input voltage at the input node. 18. A radio-frequency module comprising: a packaging substrate configured to receive a plurality of components; and a power amplification system implemented on the packaging substrate, the power amplification system including a voltage supply system, the voltage supply system including a charge pump having a boost charge pump circuit including an input node and a boosted-voltage output node, and a buck charge pump circuit including the input node and a divided-voltage output node, the boost charge pump circuit and the buck charge pump circuit sharing a common flying capacitance, the common flying capacitance configured to undergo truncated charging to limit a ripple effect in a hysteretic feedback loop, the boost charge pump circuit and the buck charge pump circuit each including a plurality of switches implemented to incorporate the common flying capacitance and generate a boosted output voltage and a divided output voltage, respectively. 19. The radio-frequency module of claim 18 wherein the plurality of switches includes a first switch (S 1 ) and a second switch (S 2 ) arranged in parallel between the input node and respective ends of the flying capacitance, a third switch (S 3 ) between a second end of the flying capacitance and a ground, a fourth switch (S 4 ) between a first end of the flying capacitance and the boosted-voltage output node, a fifth switch (S 5 ) between the first end of the flying capacitance and the divided-voltage output node, and a sixth switch (S 6 ) between the second end of the flying capacitance and the divided-voltage output node. 20. The radio-frequency module of claim 19 wherein switches S 1 , S 2 , S 3 , S 4 , S 5 , and S 6 are configured to operate in four phases to yield output voltages having magnitudes 2×Vin and Vin/2, Vin being an input voltage at the input node.

Assignees

Inventors

Classifications

  • H02M3/073Primary

    Charge pumps of the Schenkel-type · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • the clock signals being boosted to a value being higher than the input voltage value · CPC title

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Frequently asked questions

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What does patent US10523115B2 cover?
According to some implementation, a charge pump includes a boost charge pump circuit and a buck charge pump circuit sharing a common flying capacitance. In some implementations, the boost pump circuit includes an input node and a boosted-voltage output node, and the buck charge pump circuit includes the input node and a divided-voltage output node. In some implementations, the charge pump of cl…
Who is the assignee on this patent?
Skyworks Solutions Inc
What technology area does this patent fall under?
Primary CPC classification H02M3/073. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 31 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).