Multiple power supply input parallel amplifier based envelope tracking
US-9379667-B2 · Jun 28, 2016 · US
US9729048B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9729048-B2 |
| Application number | US-201514816585-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 3, 2015 |
| Priority date | Aug 4, 2014 |
| Publication date | Aug 8, 2017 |
| Grant date | Aug 8, 2017 |
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Apparatus and methods for charge pumps are disclosed herein. In certain configurations, a charge pump includes a mode control circuit, a clock generation circuit that generates a clock signal, two or more switched capacitors, and a capacitor charging circuit used to charge the switched capacitors in response to transitions of the clock signal. The mode control circuit can be used to operate the charge pump in one of a plurality of modes associated with different clock signal oscillation frequencies and with different power supply voltages of the capacitor charging circuit. For example, in certain configurations, the selected mode can control an oscillation frequency of clock signal and a voltage level of a power supply voltage used by the capacitor charging circuit when charging the switched capacitors.
Opening claim text (preview).
What is claimed is: 1. A charge pump comprising: a mode control circuit configured to operate the charge pump in a selected mode chosen from a plurality of modes; a clock generation circuit configured to generate a charge pump clock signal having an oscillation frequency that is based on the selected mode, the charge pump clock signal having a first phase and a second phase; two or more switched capacitors including a first switched capacitor and a second switched capacitor; and a capacitor charging circuit configured to charge the two or more switched capacitors based on a power high supply voltage of the capacitor charging circuit and on timing of the charge pump clock signal, the capacitor charging circuit configured to charge a first end of the first switched capacitor with the power high supply voltage and a second end of the first switched capacitor with a power low supply voltage during the first phase, and to charge a first end of the second switched capacitor with the power high supply voltage and a second end of the second switched capacitor with the power low supply voltage during the second phase, the power high supply voltage having a voltage level that is based on the selected mode. 2. The charge pump of claim 1 further comprising a charge pump filter configured to filter a charge pump output voltage of the charge pump, the charge pump filter having a filtering characteristic that is based on the selected mode. 3. The charge pump of claim 2 wherein the filtering characteristic includes a resistance of the charge pump filter. 4. The charge pump of claim 1 wherein the capacitor charging circuit includes a plurality of power supply selection switches configured to choose the power high supply voltage of the capacitor charging circuit from two or more power high supply voltages based on the selected mode. 5. The charge pump of claim 1 wherein the clock generation circuit includes a first clock generator configured to generate a first clock signal, a second clock generator configured to generate a second clock signal that has a slower oscillation frequency than the first clock signal, and a clock selection circuit configured to generate the charge pump clock signal based on selecting amongst a plurality of clock signals including the first clock signal and the second clock signal. 6. The charge pump of claim 1 wherein the capacitor charging circuit includes a first charge pump switch configured to electrically connect the second end of the first switched capacitor to the power low supply voltage during the first phase, a second charge pump switch configured to electrically connect the second end of the first switched capacitor to a charge pump output during the second phase, a third charge pump switch configured to electrically connect the second end of the second switched capacitor to the power low supply voltage during the second phase, and a fourth charge pump switch configured to electrically connect the second end of the second switched capacitor to the charge pump output during the first phase. 7. The charge pump of claim 6 wherein the capacitor charging circuit is further configured to electrically connect the first end of the first switched capacitor to the power low supply voltage during the second phase, and to electrically connect the first end of the second switched capacitor to the power low supply voltage during the first phase. 8. The charge pump of claim 1 wherein the two or more modes includes at least three modes. 9. A method of generating a charge pump output voltage, the method comprising: selecting a mode of operation of a charge pump using a mode control circuit, the selected mode chosen from a plurality of modes; controlling a frequency of a charge pump clock signal based on the selected mode using a clock generation circuit, the charge pump clock signal having a first phase and a second phase; charging two or more switched capacitors using a capacitor charging circuit based on a power high supply voltage of the capacitor charging circuit and on timing of the charge pump clock signal, including charging a first end of a first switched capacitor with the power high supply voltage and a second end of the first switched capacitor with a power low supply voltage during the first phase, and charging a first end of a second switched capacitor with the power high supply voltage and a second end of the second switched capacitor with the power low supply voltage during the second phase; and controlling a voltage level of the power high supply voltage of the capacitor charging circuit based on the selected mode. 10. The method of claim 9 further comprising controlling a resistance of a charge pump filter based on the selected mode. 11. The method of claim 9 further comprising generating a plurality of clock signals having different frequencies, and selecting amongst the plurality of clock signals to generate the charge pump clock signal. 12. The method of claim 9 wherein controlling the voltage level of the power high supply voltage includes selecting the power high supply voltage from two or more power high supply voltages based on the selected mode. 13. The method of claim 9 further comprising electrically connecting the second end of the first switched capacitor to a charge pump output during the second phase and electrically connecting the second end of the second switched capacitor to the charge pump output during the first phase. 14. A radio frequency system comprising: a power amplifier configured to generate an amplified radio frequency signal; a switch including an input configured to receive the amplified radio frequency signal; a switch controller configured to receive a charge pump output voltage and to control a state of the switch; a charge pump configured to generate the charge pump output voltage, the charge pump including a mode control circuit configured to operate the charge pump in a selected mode chosen from a plurality of modes, the charge pump further including a clock generation circuit configured to generate a charge pump clock signal having an oscillation frequency that is based on the selected mode and having a first phase and a second phase, the charge pump further including two or more switched capacitors including a first switched capacitor and a second switched capacitor, and a capacitor charging circuit configured to charge the two or more switched capacitors based on a power high supply voltage of the capacitor charging circuit and on timing of the charge pump clock signal, the capacitor charging circuit configured to charge a first end of the first switched capacitor with the power high supply voltage and a second end of the first switched capacitor with a power low supply voltage during the first phase, and to charge a first end of the second switched capacitor with the power high supply voltage and a second end of the second switched capacitor with the power low supply voltage during the second phase, the power high supply voltage having a voltage level that is based on the selected mode. 15. The radio frequency system of claim 14 wherein the charge pump further includes a charge pump filter configured to filter the charge pump output voltage, the charge pump filter having a filtering characteristic that is based on the selected mode. 16. The radio frequency system of claim 15 wherein the filtering characteristic includes a filter resistance of the charge pump filter. 17. The radio frequency system of claim 14 wherein the capacitor charging circuit includes a plurality of power supply selection switches config
using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title
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