Semiconductor device

Patent metadata

Field	Value
Publication number	US-10522682-B2
Application number	US-201815869522-A
Country	US
Kind code	B2
Filing date	Jan 12, 2018
Priority date	Aug 4, 2017
Publication date	Dec 31, 2019
Grant date	Dec 31, 2019

Abstract

A semiconductor device is provided. The semiconductor device includes a fin type pattern, a field insulating film on a part of a sidewall of the fin-type pattern, and a gate electrode intersecting with the fin-type pattern, on the fin-type pattern and the field insulating film. The gate electrode on the field insulating film includes a first portion, a second portion, and a third portion on the field insulating film. A first width of the first portion increases as a first distance from the field insulating film, increases width of the second portion decreases as a second distance from the field insulating film increases, and a third width of the third portion increases or is substantially constant as a third distance from the field insulating film increases.

First claim

What is claimed is:

1. A semiconductor device comprising:
a fin-type pattern;
a field insulating film on a part of a sidewall of the fin-type pattern; and
a gate electrode on the fin-type pattern and the field insulating film,
wherein the gate electrode intersects the fin-type pattern,
wherein the gate electrode comprises a first portion, a second portion, and a third portion that are on the field insulating film,
wherein a first width of the first portion increases as a first distance from the field insulating film increases,
wherein a second width of the second portion decreases as a second distance from the field insulating film increases,
wherein a third width of the third portion increases or is substantially constant as a third distance from the field insulating film increases,
wherein the first distance is less than the second distance and the second distance is less than the third distance,
wherein a bottom surface of the first portion of the gate electrode is lower than a top surface of the field insulating film,
wherein the gate electrode has a crest formed at a widest width of the gate electrode,
wherein the crest is disposed on substantially the same plane as the top surface of the field insulating film, and
wherein a sidewall of the gate electrode at the crest is a curved surface.

2. The semiconductor device of claim 1 , wherein the first portion comprises a first sidewall having a convex slope.

3. The semiconductor device of claim 2 ,
wherein the second portion comprises a second sidewall having a convex slope, and
wherein the first sidewall and the second sidewall are in contact with each other.

4. The semiconductor device of claim 1 , wherein at least a part of a third sidewall of the third portion has a concave slope.

5. The semiconductor device of claim 1 , wherein at least a part of the second portion is lower than a top surface of the fin-type pattern, and
the third portion is higher than the top surface of the fin-type pattern.

6. The semiconductor device of claim 1 ,
wherein a fourth width of the gate electrode on the fin-type pattern increases as a fourth distance from the field insulating film increases, and
wherein the third distance is less than the fourth distance.

7. The semiconductor device of claim 1 , further comprising:
an epitaxial pattern,
wherein the fin-type pattern comprises a first trench having a concave slope adjacent the fin-type pattern, and
wherein the epitaxial pattern fills the first trench.

8. The semiconductor device of claim 1 , further comprising:
a gate insulating film extending along sidewalls and/or a bottom surface of the gate electrode; and
a gate spacer on a sidewall of the gate insulating film.

9. The semiconductor device of claim 8 , wherein the gate insulating film conformally extends along the sidewalls and the bottom surface of the gate electrode, and
the gate spacer conformally extends along the sidewall of the gate insulating film.

10. The semiconductor device of claim 8 , wherein the bottom surface of the first portion of the gate electrode is lower than a bottom surface of the gate spacer.

11. The semiconductor device of claim 1 , further comprising:
an interlayer insulating film on the fin-type pattern and on the field insulating film,
wherein the interlayer insulating film comprises a second trench that intersects with the fin-type pattern, and
wherein the gate electrode comprises a first work function adjustment film which extends along sidewalls and a bottom surface of the second trench, and a barrier conductive film on the first work function adjustment film.

12. The semiconductor device of claim 11 , wherein the gate electrode further comprises a second work function adjustment film between the first work function adjustment film and the barrier conductive film.

13. A semiconductor device comprising:
a fin-type pattern extending along a first direction;
a field insulating film on a part of a sidewall of the fin-type pattern;
an interlayer insulating film on the field insulating film and surrounding including a trench on the fin-type pattern, the trench extending along a second direction intersecting with the first direction and comprising a triangular flask-shaped cross-section;
a gate spacer extending along a sidewall of the trench;
a gate insulating film extending along a sidewall of the gate spacer and a bottom surface of the trench; and
a gate electrode on the gate insulating film,
wherein a bottom surface of the gate electrode is lower than a bottom surface of the gate spacer,
wherein the gate electrode has a crest formed at a widest width of the gate electrode,
wherein the crest is disposed on substantially the same plane as the bottom surface of the gate spacer, and
wherein a sidewall of the gate electrode at the crest is a curved surface.

14. The semiconductor device of claim 13 , wherein the gate spacer and the gate insulating film conformally extend in the trench.

15. The semiconductor device of claim 13 , wherein the gate electrode on the field insulating film comprises a first portion, a second portion, and a third portion on the field insulating film,
a first width of the first portion increases as a first distance from the field insulating film increases,
a second width of the second portion decreases as a second distance the field insulating film increases, and
a third width of the third portion increases or is substantially constant as a third distance from the field insulating film increases,
wherein the first distance is less than the second distance and the second distance is less than the third distance.

16. The semiconductor device of claim 13 , wherein the gate electrode comprises a first work function adjustment film extending along a sidewall and a bottom surface of the gate insulating film, and a barrier conductive film on the first work function adjustment film.

17. A semiconductor device comprising:
a fin-type pattern;
a field insulating film on a part of sidewalls of the fin-type pattern; and
a gate electrode on the field insulating film,
wherein a cross section of the gate electrode has a triangular flask shape,
wherein sidewalls of the gate electrode comprise a crest,
wherein a bottom surface of the gate electrode is lower than a top surface of the field insulating film,
wherein the gate electrode has a crest formed at a widest width of the gate electrode,
wherein the crest is disposed on substantially the same plane as the top surface of the field insulating film, and
wherein a sidewall of the gate electrode at the crest is a curved surface.

18. The semiconductor device of claim 17 , further comprising:
a gate insulating film extending along a sidewall and a bottom surface of the gate electrode; and
a gate spacer on the sidewall of the gate electrode and a sidewall of the gate insulating film.

19. The semiconductor device of claim 18 ,
wherein the gate insulating film conformally extends along the sidewall and the bottom surface of the gate electrode, and
the gate spacer conformally extends along the sidewall of the gate insulating film.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Yoon Chang Seop
• Choi Byung Ha
• Kim Dae Geun
• Kim Su Min
• Park Se Wan
• Lee Ji Ho

Classifications

• H10W20/077

  on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence) · CPC title

• H01L21/823821

  Electricity · mapped topic

• H01L29/785 Primary

  Electricity · mapped topic

• H01L21/76834

  Electricity · mapped topic

• H01L27/0886

  Electricity · mapped topic