Semiconductor device
US-9954111-B2 · Apr 24, 2018 · US
US10522582B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10522582-B2 |
| Application number | US-201615761475-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 21, 2016 |
| Priority date | Oct 5, 2015 |
| Publication date | Dec 31, 2019 |
| Grant date | Dec 31, 2019 |
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Official abstract text for this publication.
The present technology relates to an imaging apparatus and a manufacturing method which enables sensitivity of an imaging apparatus using infrared rays to be improved. The imaging apparatus includes: a light-receiving element array in which a plurality of light-receiving elements including a compound semiconductor having light-receiving sensitivity in an infrared range are arrayed; a signal processing circuit that processes a signal from the light-receiving element; an upper electrode formed on a light-receiving surface side of the light-receiving element; and a lower electrode that is paired with the upper electrode, in which the light-receiving element array and the signal processing circuit are joined to each other with a film of a predetermined material, the upper electrode and the signal processing circuit are connected to each other through a through-via-hole penetrating a part of the light-receiving element, and the lower electrode is made as an electrode common to the light-receiving elements arrayed in the light-receiving element array. The present technology can be applied to an infrared sensor.
Opening claim text (preview).
The invention claimed is: 1. An imaging apparatus, comprising: a light-receiving element array that comprises a plurality of light-receiving elements, wherein each of the plurality of light-receiving elements includes a compound semiconductor having light-receiving sensitivity in an infrared range; a signal processing circuit configured to process a signal from the plurality of the light-receiving elements; an upper electrode on a light-receiving surface side of the plurality of light-receiving elements; a first lower electrode paired with the upper electrode, wherein the light-receiving element array and the signal processing circuit are joined to each other with a film of a specific material, the upper electrode and the signal processing circuit are connected to each other through a first through-via-hole penetrating a part of a light-receiving element of the plurality of light-receiving elements, and the first lower electrode is common to each of the plurality of light-receiving elements in the light-receiving element array; and a fixed-charge film that covers an interior of the first through-via-hole. 2. The imaging apparatus according to claim 1 , wherein the compound semiconductor is a group III-V semiconductor compound. 3. The imaging apparatus according to claim 1 , further comprising a second lower electrode in a lower portion of the light-receiving element of the plurality of light-receiving elements, wherein the first lower electrode and the second lower electrode are connected to each other through a second through-via-hole, and the second through-via-hole penetrates to the second lower electrode. 4. The imaging apparatus according to claim 1 , further comprising a second lower electrode in a lower portion of the light-receiving element of the plurality of light-receiving elements, wherein the first lower electrode is, at an outer peripheral portion of the light-receiving element array, connected to the second lower electrode. 5. The imaging apparatus according to claim 1 , wherein the first lower electrode is connected to the signal processing circuit at an outer peripheral portion of the light-receiving element array. 6. The imaging apparatus according to claim 1 , wherein a part of the upper electrode is on the fixed-charge film.
the interconnections being through-semiconductor vias · CPC title
Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title
SSIS architectures; Circuits associated therewith · CPC title
Addressed sensors, e.g. MOS or CMOS sensors · CPC title
Use of specially adapted circuits, e.g. bridge circuits · CPC title
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