Method of fabricating device including two-dimensional material

Patent metadata

Field	Value
Publication number	US-10515798-B2
Application number	US-201816120775-A
Country	US
Kind code	B2
Filing date	Sep 4, 2018
Priority date	Sep 4, 2017
Publication date	Dec 24, 2019
Grant date	Dec 24, 2019

Abstract

A method of fabricating a device including a two-dimensional (2D) material includes forming a transition metal oxide pattern on a substrate and forming a transition metal dichalcogenide layer on a top surface and a side surface of a residual portion of the transition metal oxide pattern. The forming the transition metal dichalcogenide layer may include replacing a surface portion of the transition metal oxide pattern with the transition metal dichalcogenide layer. The transition metal dichalcogenide layer includes at least one atomic layer that is substantially parallel to a surface of the residual portion of the transition metal oxide pattern.

First claim

What is claimed is:

1. A method of fabricating a device comprising a two-dimensional (2D) material, the method comprising:
forming a transition metal oxide pattern on a substrate; and
forming a transition metal dichalcogenide layer on a top surface and a side surface of a residual portion of the transition metal oxide pattern,
the forming the transition metal dichalcogenide layer including replacing a surface portion of the transition metal oxide pattern with the transition metal dichalcogenide layer
the transition metal dichalcogenide layer including at least one atomic layer that is substantially parallel to a surface of the residual portion of the transition metal oxide pattern.

2. The method of claim 1 , wherein the transition metal oxide pattern includes crystalline molybdenum dioxide.

3. The method of claim 1 , wherein
the transition metal oxide pattern includes a transition metal oxide, and
the forming the transition metal dichalcogenide layer is performed at a temperature lower than a sublimation temperature of the transition metal oxide in the transition metal oxide pattern.

4. The method of claim 1 , wherein the forming the transition metal dichalcogenide layer comprises reacting the transition metal oxide pattern with a reactant containing a chalcogen-group element.

5. The method of claim 4 , wherein the reactant includes sulfur vapor.

6. The method of claim 1 , wherein
the transition metal dichalcogenide layer includes a first portion and a second portion,
the first portion is on the top surface of the residual portion of the transition metal oxide pattern,
the second portion is on the side surface of the residual portion of the transition metal oxide pattern,
the at least one atomic layer is substantially parallel to a main surface of the substrate in the first portion of the transition metal dichalcogenide layer, and
the at least one atomic layer is substantially perpendicular to a main surface of the substrate in the second portion of the transition metal dichalcogenide layer.

7. The method of claim 1 , further comprising:
removing a first portion of the transition metal dichalcogenide layer, wherein
the transition metal dichalcogenide layer includes the first portion and a second portion,
the first portion is on the top surface of the residual portion of the transition metal oxide pattern, and
the second portion is on the side surface of the transition metal oxide pattern.

8. A method of fabricating a device comprising a two-dimensional (2D) material, the method comprising:
forming a material pattern on a substrate; and
forming a 2D material layer on a residual portion of the material pattern, the forming the 2D material layer including replacing a surface portion of the material pattern with 2D material layer; and
forming a pair of 2D material patterns on a pair of opposite side surfaces of the residual portion of the material pattern, the forming the pair of 2D material patterns including removing a portion of the 2D material layer.

9. The method of claim 8 , wherein the 2D material layer includes at least one atomic layer parallel to a surface of the residual portion of the material pattern.

10. The method of claim 8 , wherein
each of the pair of opposite side surfaces of the residual portion of the material pattern is substantially perpendicular to the substrate, and
each of the pair of 2D material patterns has at least one atomic layer that is substantially perpendicular to the substrate.

11. The method of claim 8 , wherein the forming the 2D material layer is performed in a temperature range lower than a sublimation temperature of a material included in the material pattern.

12. The method of claim 8 , wherein
the forming the pair of 2D material patterns includes removing a portion of the 2D material layer that is formed on a top surface of the residual portion of the material pattern.

13. The method of claim 12 , wherein the removing the portion of the 2D material layer that is formed on the top surface of the residual portion of the material pattern, includes:
covering the substrate and the 2D material layer with a cover layer; and
exposing the residual portion of the material pattern, the exposing the residual portion of the material pattern including polishing an upper portion of the cover layer and the portion of the 2D material layer that is formed on the top surface of the residual portion of the material pattern.

14. The method of claim 12 , wherein the forming the pair of 2D material patterns further includes removing portions of the 2D material layer that are formed on another pair of opposite side surfaces of the residual portion of the material pattern.

15. The method of claim 8 , wherein the 2D material layer includes a transition metal dichalcogenide.

16. The method of claim 8 , wherein the material pattern includes crystalline molybdenum dioxide.

17. A method of fabricating a device comprising a two-dimensional (2D) material, the method comprising:
forming a pair of lower electrodes on a substrate;
forming a material pattern in contact with the pair of lower electrodes;
forming a 2D material layer on a residual portion of the material pattern, the forming the 2D material layer including replacing a surface portion of the material pattern with the 2D material layer;
forming a pair of 2D material patterns and a pair of gate structures contacting the pair of 2D material patterns,
the pair of 2D material patterns extending from the pair of lower electrodes along a pair of opposite side surfaces of the residual portion of the material pattern; and
forming a pair of upper electrodes on end parts of the pair of 2D material patterns that are opposite to end portions of the pair of 2D material patterns contacting the pair of lower electrodes.

18. The method of claim 17 , wherein the forming the pair of 2D material patterns and the pair of gate structures includes:
covering the 2D material layer with a cover layer;
exposing the residual portion of the material pattern, the exposing the residual portion of the material pattern including polishing an upper portion of the cover layer and a portion of the 2D material layer on a top surface of the residual portion of the material pattern;
removing the cover layer; and
forming the pair of gate structures in a space from which the cover layer is removed.

19. The method of claim 17 , wherein the forming of the pair of 2D material patterns and the pair of gate structures comprises:
covering the 2D material layer with a cover layer;
polishing an upper portion of the cover layer and a portion of the 2D material layer on a top surface of the residual portion of the material pattern to expose the residual portion of the material pattern;
removing the residual portion of the material pattern; and
forming the pair of gate structures in a space from which the residual portion of the material pattern is removed.

20. The method of claim 17 , wherein the forming the pair of 2D material patterns and the pair of gate structures comprises:
sequentially forming a gate insulating layer, a gate electrode layer, and a filling insulating layer on the 2D material layer; and
removing an upper portion of the filling insulating layer, an upper portion of the gate electrode layer, an upper portion of the gate insulating layer, and a portion of the 2D material layer on a top surface of the residual portion of the material pattern to expose the residual portion of the material pattern.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Park Tae-Jin
• Kim Bong-Soo
• Kim Jin-Bum
• Hwang Yoo-Sang

Classifications

• H10P14/3256

  Microstructure · CPC title

• H10P14/3242

  Structure · CPC title

• H10P14/3238

  being insulating materials · CPC title

• H10P14/2925

  Surface structures · CPC title

• H10P14/20

  of semiconductor materials · CPC title