Device including vertically aligned two-dimensional material

Patent metadata

Field	Value
Publication number	US-9658186-B2
Application number	US-201514972873-A
Country	US
Kind code	B2
Filing date	Dec 17, 2015
Priority date	Jul 3, 2015
Publication date	May 23, 2017
Grant date	May 23, 2017

Abstract

A transistor includes a substrate, a two-dimensional material including at least one layer that is substantially vertically aligned on the substrate such that an edge of the layer is on the substrate and the layer extends substantially vertical to the substrate, a source electrode and a drain electrode connected to opposite ends of the two-dimensional material, a gate insulation layer on the two-dimensional material between the source electrode and the drain electrode, and a gate electrode on the gate insulation layer. Each layer includes a semiconductor having a two-dimensional crystal structure.

First claim

What is claimed is:

1. A transistor comprising:
a substrate;
a two-dimensional material on the substrate, the two-dimensional material including at least one layer that is substantially vertically aligned to the substrate such that an edge of the at least one layer is on the substrate and the at least one layer extends substantially vertical to the substrate, each layer being a transition metal dichalcogenide monolayer;
a source electrode and a drain electrode connected to opposite ends of the two-dimensional material;
a gate insulation layer on the two-dimensional material between the source electrode and the drain electrode; and
a gate electrode on the gate insulation layer.

2. The transistor of claim 1 , wherein
the two-dimensional material includes a plurality of layers that are substantially vertically aligned to the substrate, and
the plurality of layers are parallel to each other.

3. The transistor of claim 1 , wherein
the two-dimensional material includes an upper surface and side surfaces,
the gate insulation layer and the gate electrode are on the upper surface and the side surfaces of the two-dimensional material.

4. A gas sensor comprising:
a substrate;
at least one two-dimensional material capable of adsorbing a desired gas,
the two-dimensional material including at least one layer that is substantially vertically aligned on the substrate such that an edge of the at least one layer is on the substrate and the at least one layer extends substantially vertical to the substrate,
each layer being a transition metal dichalcogenide monolayer; and
first and second electrodes connected to opposite ends of the two-dimensional material.

5. The gas sensor of claim 4 , further comprising:
a heater contacting the substrate, wherein
the heater is configured to remove the desired gas from being adsorbed onto the two-dimensional material by heating the at least one two-dimensional material.

6. The gas sensor of claim 4 , wherein
the at least one two-dimensional material includes a plurality of layers that are substantially vertically aligned to the substrate, and
the plurality of layers are parallel to each other.

7. A device comprising:
a substrate;
a two-dimensional material on the substrate, the two-dimensional material including at least one layer that has a width greater than a thickness and is arranged so the width of the at least one layer extends substantially vertical to the substrate, each layer being a transition metal dichalcogenide monolayer, a first electrode and a second electrode spaced apart from each other on the substrate, the first and second electrodes being connected to opposite ends of the two-dimensional material.

8. The device of claim 7 , further comprising:
a gate insulation layer on the two-dimensional material between the first electrode and the second electrode; and
a gate electrode on the gate insulation layer, wherein
the gate electrode is spaced apart from the first electrode and the second electrode.

9. The device of claim 7 , further comprising:
a heater connected to the substrate, wherein
the two-dimensional material is over the heater,
a gas is capable of adsorbing to the two-dimensional layer, and
the heater is configured to remove the gas from being adsorbed onto the two-dimensional material by heating the two-dimensional material.

10. The device of claim 7 , wherein
the two-dimensional material includes a plurality of layers that are substantially vertically aligned to the substrate, and
the plurality of layers are parallel to each other.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Yang Kiyeon
• Lee Changseung
• Kim Namjeong
• Kim Yeonhee

Classifications

• H10P50/242

  of Group IV materials · CPC title

• H10P14/3452

  Microstructure · CPC title

• H10P14/3436 Primary

  being chalcogenide semiconductor materials not being oxides, e.g. ternary compounds · CPC title

• H10P14/203

  using transformation of metal, e.g. oxidation or nitridation · CPC title

• H10P14/24

  using chemical vapour deposition [CVD] · CPC title