Semiconductor device

Patent metadata

Field	Value
Publication number	US-10411016-B2
Application number	US-201816043619-A
Country	US
Kind code	B2
Filing date	Jul 24, 2018
Priority date	Dec 19, 2016
Publication date	Sep 10, 2019
Grant date	Sep 10, 2019

Abstract

A semiconductor device includes a substrate, a plurality of lower electrodes disposed on the substrate and are repeatedly arranged in a first direction and in a second direction that crosses the first direction, and a first electrode support contacting a sidewall of at least one of the lower electrodes. The first electrode support includes a first support region including a first opening and a second support region disposed at a border of the first support region. An outer sidewall of the first electrode support includes a first sidewall extending in the first direction, a second sidewall extending in the second direction, and a connecting sidewall connecting the first and second sidewalls. The second support region includes the connecting sidewall. In a first portion of the second support region, a width of the first portion of the second support region decreases in a direction away from the first support region.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a substrate;
a plurality of lower electrodes disposed on the substrate, wherein individual lower electrodes of the plurality of lower electrodes are repeatedly arranged in a first direction and in a second direction that crosses the first direction; and
a first electrode support contacting a sidewall of at least one of the lower electrodes to support the at least one of the lower electrodes,
wherein the first electrode support comprises a first support region and a second support region disposed at a border of the first support region, wherein the first support region includes a first opening,
wherein an outer sidewall of the first electrode support comprises first sidewalls extending in the first direction, second sidewalls extending in the second direction, and four connecting sidewalls connecting the first sidewalls with the second sidewalls,
wherein the second support region comprises the connecting sidewalls, and
wherein each of boundaries of an upper surface of the first electrode support, corresponding to at least two of the connecting sidewalls has one of a line shape extending in a third direction crossing the first and second directions, a curved shape, and a zigzag shape.

2. The semiconductor device of claim 1 , wherein each of the boundaries of the upper surface of the first electrode support, corresponding to the at least two of the connecting sidewalls has the line shape extending in the third direction.

3. The semiconductor device of claim 1 , wherein each of the boundaries of the upper surface of the first electrode support, corresponding to the at least two of the connecting sidewalls has the curved shape.

4. The semiconductor device of claim 1 , wherein the zigzag shape has a first partial line extending in a fourth direction, and a second partial line extending in a fifth direction, and
wherein a corner where the first partial line and second partial line meet is rounded.

5. The semiconductor device of claim 1 , each of boundaries of the upper surface of the first electrode support, corresponding to four of the connecting sidewalls has one of the line shape extending in the third direction, the curved shape and the zigzag shape.

6. The semiconductor device of claim 1 , wherein the lower electrodes comprise a first row of the lower electrodes, a second row of the lower electrodes and a third row of the lower electrodes consecutively arranged,
wherein each of the first, second and third rows of the lower electrodes extends in the first direction, and wherein the first and second directions are perpendicular to each other,
wherein a first line that extends in the first direction passes through each lower electrode of the second row of the lower electrodes, and
wherein a second line that extends in the second direction passes through one of the lower electrodes of the first row of the low electrodes, through one of the lower electrodes of the third row of the low electrodes, but not through one of the lower electrodes of the second row of the low electrodes.

7. The semiconductor device of claim 1 , wherein the lower electrodes comprise a first row of the lover electrodes, a second row of the lower electrodes, and a third row of the lower electrodes consecutively arranged,
wherein each of the first, second, and third rows of the lower electrodes extends in the first direction, and wherein the first and second directions are perpendicular to each other,
wherein a first line that extends in the first direction passes through each lower electrode of the second row of the lower electrodes, and
wherein a second line that extends in the second direction passes through one of the lower electrodes of the first row of the low electrodes, through one of the lower electrodes of the second row of the low electrodes, through one of the lower electrodes of the third row of the low electrodes.

8. The semiconductor device of claim 1 , wherein each of the boundaries of the upper surface of the first electrode support, corresponding to the at least two of the connecting sidewalls has one of the line shape extending in the third direction, and the zigzag shape, and
wherein a first corner where the at least two of the connecting sidewalls and the first sidewalls meet, and a second corner where the at least two of the connecting sidewalls and the second sidewalls meet are rounded.

9. The semiconductor device of claim 1 , further comprising a second electrode support disposed between the substrate and the first electrode support,
wherein the second electrode support is in contact with the sidewall of the at least one of the lower electrodes to support the at least one of the lower electrodes.

10. A semiconductor device, comprising:
a substrate;
a plurality of lower electrodes disposed on the substrate; and
an electrode support contacting a sidewall of at least one of the lower electrodes to support the at least one of the lower electrodes,
wherein an outer sidewall of the electrode support comprises first and second sidewalls extending in a first direction, a third sidewall extending in a second direction, and a first connecting sidewall connecting the first sidewall with the third sidewall, and wherein the first and second directions are perpendicular to each other,
wherein the lower electrodes comprise a first group of the lower electrodes and a second group of the lower electrodes consecutively arranged in the first direction,
wherein each of the first and second groups of the lower electrodes is arranged in a zigzag manner along the second direction,
wherein the first group of the lower electrodes comprises a first lower electrode and a second lower electrode which are closest to each other,
wherein a first line that extends in a third direction different from the first and second directions passes through the first lower electrode and the second lower electrode, and
wherein the first connecting sidewall is substantially parallel with the first line.

11. The semiconductor device of claim 10 , wherein the outer sidewall of the electrode support further includes a second connecting sidewall connecting the second sidewall with the third sidewall, and
wherein boundary of an upper surface of the electrode support, corresponding to the second connecting sidewall has one of a line shape extending in a third direction crossing the first, second and third directions, a curved shape, and a zigzag shape.

12. The semiconductor device of claim 10 , wherein the outer sidewall of the electrode support further includes a second connecting sidewall connecting the second sidewall with the third sidewall,
wherein the first group of the lower electrodes comprises a third lower electrode which is closest to the first lower electrode,
wherein the first lower electrode is positioned between the second electrode and the third lower electrode,
wherein a second line that extends in a fourth direction different from the first, second and third directions passes through the first lower electrode and the third lower electrode, and
wherein the second connecting sidewall is substantially parallel with the second line.

13. The semiconductor device of claim 10 , wherein a corner Where the first connecting sidewall and the first sidewall meet is rounded.

14. The semiconductor device of claim 10 , wherein the lower electrodes comprise a first row of the lower electrodes, a second row of the lower electrodes and a third row of the lower electrodes consecutively arranged in the second direction,
wherein each of the first, second and third rows of the lower electrodes extends in the

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Ye Ram
• Lee Won Chul

Classifications

• H01L28/87

  Electricity · mapped topic

• H01L28/56

  Electricity · mapped topic

• H01L27/10852 Primary

  Electricity · mapped topic

• H01L27/10814

  Electricity · mapped topic

• H01L28/91

  Electricity · mapped topic