Semiconductor devices

Patent metadata

Field	Value
Publication number	US-9871093-B2
Application number	US-201615383159-A
Country	US
Kind code	B2
Filing date	Dec 19, 2016
Priority date	Feb 17, 2016
Publication date	Jan 16, 2018
Grant date	Jan 16, 2018

Abstract

Provided is a semiconductor device. The semiconductor device includes a capacitor structure including a plurality of lower electrodes, a dielectric layer that covers surfaces of the plurality of lower electrodes, and an upper electrode on the dielectric layer. The semiconductor device further includes a support structure that supports the plurality of lower electrodes. The support structure includes a first support region that covers sidewalls of one of the plurality of lower electrodes, and an opening that envelops the first support region when the semiconductor device is viewed in plan view.

First claim

What is claimed is:

1. A semiconductor device comprising:
a capacitor structure comprising a plurality of lower electrodes, a dielectric layer that covers surfaces of the plurality of lower electrodes, and a plurality of upper electrodes on the plurality of dielectric layers, respectively; and
a support structure that supports the plurality of lower electrodes,
wherein the support structure comprises:
a first support region that covers sidewalls of a first one of the plurality of lower electrodes; and
an opening that envelops the first support region when the semiconductor device is viewed in plan view.

2. The semiconductor device of claim 1 , wherein the support structure further comprises a second support region that covers sidewalls of a second one of the plurality of lower electrodes,
wherein the second support region envelops the opening when the semiconductor device is viewed in plan view.

3. The semiconductor device of claim 2 , wherein the first support region comprises a first material and the second support region comprises a second material,
wherein the first material and the second material are different from each other.

4. The semiconductor device of claim 2 , wherein the first support region comprises a first material and the second support region comprises a second material,
wherein the first material and the second material are substantially the same.

5. The semiconductor device of claim 2 , wherein the opening has a substantially uniform width along its length.

6. The semiconductor device of claim 2 , wherein a distance from a plane defined by bottom surfaces of the lower electrodes to a bottom surface of the first support region is substantially the same as a distance from the plane defined by the bottom surfaces of the lower electrodes to a bottom surface to the second support region.

7. The semiconductor device of claim 2 , wherein a distance from a plane defined by bottom surfaces of the lower electrodes to a top surface of the first support region is substantially the same as a distance from the plane defined by the bottom surfaces of the lower electrodes to a top surface of the second support region.

8. The semiconductor device of claim 1 , wherein the support structure is a first support structure and the semiconductor device further comprises:
a second support structure that supports the plurality of lower electrodes at a different height than the first support structure relative to bottom surfaces of the lower electrodes.

9. A semiconductor device comprising:
a capacitor structure comprising a plurality of lower electrodes, a dielectric layer that covers surfaces of the plurality of lower electrodes, and an upper electrode on the dielectric layer; and
a support structure that supports the plurality of lower electrodes,
wherein the support structure comprises:
a first support region that covers sidewalls of a first one of the plurality of lower electrodes;
a second support region that covers sidewalls of a second one of the plurality of lower electrodes; and
an opening between the first support region and the second support region,

wherein the opening separates the first support region and the second support region from each other.

10. The semiconductor device of claim 9 , wherein a distance from a plane defined by bottom surfaces of the lower electrodes to a bottom surface of the first support region is substantially the same as a distance from the plane defined by the bottom surfaces of the lower electrodes to a bottom surface to the second support region.

11. The semiconductor device of claim 10 , wherein the opening envelops the first support region when the semiconductor device is viewed in plan view.

12. The semiconductor device of claim 11 , wherein the second support region envelops the opening when the semiconductor device is viewed in plan view.

13. The semiconductor device of claim 10 , wherein the opening has a substantially uniform width along its length.

14. The semiconductor device of claim 9 , wherein the first support region comprises a first material and the second support region comprises a second material,
wherein the first material and the second material are different from each other.

15. The semiconductor device of claim 9 , wherein the first support region comprises a first material and the second support region comprises a second material,
wherein the first material and the second material are substantially the same.

16. A semiconductor device comprising:
a capacitor structure comprising a plurality of lower electrodes, a dielectric layer that covers surfaces of the plurality of lower electrodes, and an upper electrode on the dielectric layer;
a first support region that contacts a sidewall of a first one of the plurality of lower electrodes and having a polygonal shape when the semiconductor device is viewed in plan view; and
a second support region that contacts a sidewall of a second one of the plurality of lower electrodes and surrounding the first support region when the semiconductor device is viewed in plan view.

17. The semiconductor device of claim 16 , wherein the first support region and the second support region are separated from each other by an opening.

18. The semiconductor device of claim 16 , wherein the first support region and the second support region comprise a first support structure, the semiconductor device further comprising a second support structure comprising:
a third support region that contacts the sidewall of the first one of the plurality of lower electrodes and having the polygonal shape when the semiconductor device is viewed in plan view; and
a fourth support region that contacts the sidewall of the second one of the plurality of lower electrodes and surrounding the first support region when the semiconductor device is viewed in plan view.

19. The semiconductor device of claim 18 , wherein the first support structure overlaps the second support structure when the semiconductor device is viewed in plan view.

20. The semiconductor device of claim 18 , wherein the first support structure and the second support structure are disposed at different heights relative to a plane defined by bottom surfaces of the lower electrodes.

Assignees

• Samsung Electronics Co Ltd
• Samsung Electonics Co Ltd

Inventors

• Kim Kyung-Eun
• Nam Ki-Hyung
• Kim Byung Yoon
• Kim Bong-Soo
• Kim Eunjung
• Hwang Yoosang

Classifications

• H01L28/56 Primary

  Electricity · mapped topic

• H01L28/75

  Electricity · mapped topic

• H01L27/10808

  Electricity · mapped topic

• H01L28/92

  Electricity · mapped topic

• H01L28/88

  Electricity · mapped topic