Method for fabricating semiconductor device

Patent metadata

Field	Value
Publication number	US-10403739-B2
Application number	US-201815865531-A
Country	US
Kind code	B2
Filing date	Jan 9, 2018
Priority date	Jun 29, 2017
Publication date	Sep 3, 2019
Grant date	Sep 3, 2019

Abstract

A method for fabricating a semiconductor device includes forming a stacked structure including at least one sacrificial layer and at least one semiconductor layer alternately stacked on a substrate, forming a dummy gate structure on the stacked structure, etching a recess in the stacked structure using the dummy gate structure as a mask, etching portions of the sacrificial layer exposed by the recess to form an etched sacrificial layer, forming a first spacer film on the etched sacrificial layer, forming a second spacer film on the first spacer film, the second spacer film including a material different from a material of the first spacer film, removing a first portion of the second spacer film, such that a second portion of the second spacer film remains, and forming a third spacer film on the second portion of the second spacer film.

First claim

What is claimed is:

1. A method for fabricating a semiconductor device, the method comprising:
forming a stacked structure on a substrate, the stacked structure including at least one sacrificial layer and at least one semiconductor layer alternately stacked on the substrate;
forming a dummy gate structure on the stacked structure;
etching a recess in the stacked structure using the dummy gate structure as a mask;
etching portions of the at least one sacrificial layer exposed by the recess to form at least one etched sacrificial layer;
forming a first spacer film on the at least one etched sacrificial layer;
forming a second spacer film on the first spacer film, the second spacer film including a material different from a material of the first spacer film;
removing a first portion of the second spacer film, such that a second portion of the second spacer film remains; and
forming a third spacer film on the second portion of the second spacer film.

2. The method as claimed in claim 1 , wherein forming the dummy gate structure includes:
forming a dummy gate on the stacked structure;
conformally depositing an insulating film to cover an upper surface of the stacked structure and the dummy gate;
conformally depositing a dummy gate spacer film on the insulating film; and
forming a dummy gate spacer on a sidewall of the dummy gate by etching-back the dummy gate spacer film.

3. The method as claimed in claim 1 , wherein:
the at least one sacrificial layer includes a plurality of sacrificial layers, and the at least one semiconductor layer includes a plurality of semiconductor layers, and
removing the first portion of the second spacer film includes removing a portion of the second spacer film formed between adjacent ones of the plurality of the semiconductor layers using a wet etching process.

4. The method as claimed in claim 1 , wherein:
the at least one sacrificial layer includes a plurality of sacrificial layers, and the at least one semiconductor layer includes a plurality of semiconductor layers, and
removing the first portion of the second spacer film includes removing a portion of the second spacer film protruding in a side surface direction farther than the plurality of the semiconductor layers using a dry etching process.

5. The method as claimed in claim 4 , wherein the first spacer film includes silicon nitride (SiN), and the second spacer film includes silicon carbonitride (SiCN).

6. The method as claimed in claim 1 , wherein the first spacer film includes silicon carbonitride (SiCN), and the second spacer film includes silicon nitride (SiN).

7. The method as claimed in claim 1 , wherein the first spacer film includes silicon oxycarbonitride (SiOCN), and the second spacer film includes silicon oxynitride (SiON).

8. The method as claimed in claim 1 , further comprising:
after forming the third spacer film, removing a first portion of the third spacer film, such that a second portion of the third spacer film remains, and
forming a fourth spacer film on the second portion of the third spacer film, the fourth spacer film including a same material as the third spacer film.

9. The method as claimed in claim 1 , further comprising, after forming the third spacer film, forming a fifth spacer film on the third spacer film.

10. The method as claimed in claim 9 , wherein the third spacer film includes a same material as the first spacer film, and the fifth spacer film includes a same material as the second spacer film.

11. A method for fabricating a semiconductor device, the method comprising:
forming a stacked structure on a substrate, the stacked structure including sacrificial layers and semiconductor layers alternately stacked on the substrate;
forming a dummy gate structure on the stacked structure;
etching a recess in the stacked structure using the dummy gate structure as a mask;
forming a first exposed region between adjacent ones of the semiconductor layers by etching a portion of at least one sacrificial layer between the adjacent ones of the semiconductor layers;
conformally forming a first spacer film on the at least one etched sacrificial layer and the semiconductor layers, such that the first spacer film is conformally formed on the first exposed region to define a second exposed region on the first spacer film;
conformally forming a second spacer film on the first spacer film in the second exposed region;
forming a third exposed region by etching a portion of the second spacer film in the second exposed region; and
forming a third spacer film on the first and second spacer films in the third exposed region.

12. The method as claimed in claim 11 , wherein forming the third exposed region includes removing the second spacer film excluding a portion of the second spacer film formed adjacently to the sacrificial layer, such that a portion of the first spacer film is exposed.

13. The method as claimed in claim 11 , wherein the first spacer film includes a material different from a material of the second spacer film.

14. The method as claimed in claim 11 , wherein the third spacer film includes a same material as the second spacer film.

15. The method as claimed in claim 11 , wherein the first spacer film, the second spacer film, and the third spacer film are each conformally formed by an atomic layer deposition (ALD) method.

16. A method for fabricating a semiconductor device, the method comprising:
forming a stacked structure on a substrate, the stacked structure including at least one sacrificial layer and at least one semiconductor layer alternately stacked on the substrate;
forming a dummy gate on the stacked structure;
forming a dummy gate spacer on a sidewall of the dummy gate;
etching a recess in the stacked structure using the dummy gate and the dummy gate spacer as a mask;
etching a portion of the at least one sacrificial layer exposed by the recess;
removing the dummy gate spacer;
conformally forming a first spacer film on the dummy gate, the at least one semiconductor layer, and the at least one sacrificial layer;
conformally forming a second spacer film on the first spacer film, the second spacer film including a material different from a material of the first spacer film;
removing the second spacer film excluding a portion of the second spacer film formed on a side surface of the at least one sacrificial layer; and
forming a third spacer film on the first spacer film and the second spacer film.

17. The method as claimed in claim 16 , further comprising, after forming the third spacer film, etching the first and third spacer films formed on a side surface of the at least one semiconductor layer to expose the side surface of the at least one semiconductor layer by the recess.

18. The method as claimed in claim 17 , further comprising, after forming the first and third spacer films formed on the side surface of the at least one semiconductor layer:
forming a source/drain on the recess;
removing the dummy gate and the at least one sacrificial layer; and
forming a gate electrode to surround the at least one semiconductor layer.

19. The method as claimed in claim 16 , wherein forming the dummy gate spacer includes:
conformally depositing an insulating film to cover an upper surface of the stacked structure and the dummy gate;
conformally depositing a dummy gate spacer film on the insulating film; and
forming the dummy gate spacer on the sidewall of the dummy gate by etching-back the dummy gate spacer film.

20. The method as claimed in claim 1

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Tea Won
• Tak Yong Suk
• Park Ki Yeon

Classifications

• H01L29/66795

  Electricity · mapped topic

• H01L29/6653

  Electricity · mapped topic

• H01L29/66545

  Electricity · mapped topic

• H01L29/6656 Primary

  Electricity · mapped topic

• H01L29/0673

  Electricity · mapped topic