Method of forming metal contacts in the barrier layer of a group III-N HEMT

Patent metadata

Field	Value
Publication number	US-10374057-B2
Application number	US-201715730853-A
Country	US
Kind code	B2
Filing date	Oct 12, 2017
Priority date	Apr 3, 2013
Publication date	Aug 6, 2019
Grant date	Aug 6, 2019

Abstract

Metal contact openings are etched in the barrier layer of a group III-N HEMT with a first gas combination that etches down into the barrier layer, and a second gas combination that etches further down into the barrier layer to a depth that lies above the top surface of a channel layer that touches and lies below the barrier layer.

First claim

What is claimed is:

1. A method of forming a high electron mobility transistor comprising:
forming a channel layer over a substrate;
forming a barrier layer over the channel layer, the barrier layer including a GaN material;
etching the GaN material of the barrier layer with a gas combination that includes boron trichloride (BCl 3 ) and sulfur hexafluoride (SF 6 ) to form a number of metal contact openings, each of the metal contact openings having a bottom surface that lies above and spaced apart from a top surface of the channel layer; and
etching the GaN material of the barrier layer exposed by the metal contact openings with a gas combination that includes boron trichloride (BCl 3 ) and chlorine (Cl 2 ) to deepen each metal contact opening to a second bottom surface, the second bottom surface lying above and spaced apart from the top surface of the channel layer.

2. The method of claim 1 , further comprising depositing a metal contact layer that contacts each second bottom surface and fills the metal contact openings.

3. The method of claim 2 , further comprising planarizing the metal contact layer to form a number of spaced-apart metal contacts that lie in the number of metal contact openings.

4. The method of claim 1 , wherein the gas combination that includes BCl 3 and SF 6 also etches through a cap layer over the barrier layer, and through a passivation layer over the cap layer.

5. The method of claim 4 , wherein the cap layer includes GaN and the passivation layer includes silicon nitride.

6. The method of claim 1 , wherein the gas combination that includes BCl 3 and SF 6 also etches through a passivation layer over the barrier layer.

7. The method of claim 6 , wherein the passivation layer includes silicon nitride.

8. The method of claim 1 , wherein the channel layer includes GaN.

9. The method of claim 1 , wherein the GaN material of the barrier layer is AlGaN.

Assignees

• Texas Instruments Inc

Inventors

• Kondo Yoshikazu
• Wada Shoji
• Yamasaki Hiroshi
• Iwamoto Masahiro

Classifications

• H10P50/246

  of Group III-V materials · CPC title

• H10P14/40

  of conductive or resistive materials · CPC title

• H10D64/0116

  to Group III-V semiconductors · CPC title

• H01L21/28575

  Electricity · mapped topic

• H01L29/2003

  Electricity · mapped topic