Array substrate and fabrication method thereof, optical touch screen, and display device

Patent metadata

Field	Value
Publication number	US-10324553-B2
Application number	US-201615327767-A
Country	US
Kind code	B2
Filing date	Mar 24, 2016
Priority date	May 12, 2015
Publication date	Jun 18, 2019
Grant date	Jun 18, 2019

Abstract

Disclosed is an array substrate including a base substrate and a gate metal layer, a semiconductor layer, a source-drain metal layer, and a pixel electrode layer that are formed on the base substrate. The gate metal layer includes gate lines, gate electrodes of thin film transistors, and a plurality of first sensing lines extending along a row direction. The semiconductor layer includes an active layer of the thin film transistors, and a plurality of first photosensitive elements and a plurality of second photosensitive elements that are insulated from each other. The source-drain metal layer includes data lines, source electrodes and drain electrodes of the thin film transistors, and a plurality of second sensing lines extending along a column direction. Also disclosed are a method of fabricating the array substrate, an optical touch screen and a display device.

First claim

What is claimed is:

1. An array substrate comprising:
a base substrate; and
a gate metal layer, a semiconductor layer, a source-drain metal layer, and a pixel electrode layer that are formed on the base substrate, the gate metal layer comprising gate lines, gate electrodes of thin film transistors, and a plurality of first sensing lines extending along a row direction, the semiconductor layer comprising an active layer of the thin film transistors, and a plurality of first photosensitive elements and a plurality of second photosensitive elements insulated from each other, the source-drain metal layer comprising data lines, source electrodes and drain electrodes of the thin film transistors, and a plurality of second sensing lines extending along a column direction;
wherein the plurality of first photosensitive elements are arranged in an array and the first photosensitive elements of a same row are electrically connected to a corresponding one of the plurality of first sensing lines, each of the plurality of first photosensitive elements being configured to generate a current signal responsive to ambient light, and each of the plurality of first sensing lines being configure to transfer current signals generated by a corresponding row of first photosensitive elements;
wherein the plurality of second photosensitive elements are arranged in an array and the second photosensitive elements of a same column are electrically connected to a corresponding one of the plurality of second sensing lines, each of the plurality of second photosensitive elements being configured to generate a current signal responsive to ambient light, each of the plurality of second sensing lines being configure to transfer the current signal generated by a corresponding column of second photosensitive elements;
wherein the gate metal layer further comprises a plurality of shielding electrodes each located under a respective one of the plurality of second photosensitive elements to shield the respective second photosensitive element from illumination by a backlight; and
wherein the plurality of first sensing lines are each provided with an extension part for shielding a respective one of the plurality of first photosensitive elements from illumination by a backlight.

2. The array substrate of claim 1 , further comprising a plurality of connection electrodes formed in the pixel electrode layer, wherein each of the connection electrodes provides electrical connection between a corresponding one of the plurality of first sensing lines and a corresponding one of the plurality of first photosensitive elements.

3. The array substrate of claim 2 , further comprising a plurality of transition electrodes formed in the source-drain metal layer, wherein each of the transition electrodes connects a respective one of the plurality of connection electrodes to a respective one of the plurality of first photosensitive elements.

4. An optical touch screen comprising the array substrate as recited in claim 3 .

5. An optical touch screen comprising the array substrate as recited in claim 2 .

6. The array substrate of claim 1 , wherein the plurality of first sensing lines are parallel to the gate lines, and wherein the plurality of second sensing lines are parallel to the data lines.

7. The array substrate of claim 6 , wherein the gate lines and the data lines intersect each other to define a plurality of pixel units, wherein the plurality of first photosensitive elements and the plurality of second photosensitive elements are divided into a plurality of photosensitive element groups each comprising a respective one of the first photosensitive elements and a respective one of the second photosensitive elements, and wherein each of the photosensitive element groups corresponds to one or more pixel units.

8. An optical touch screen comprising the array substrate as recited in claim 7 .

9. An optical touch screen comprising the array substrate as recited in claim 6 .

10. The array substrate of claim 1 , wherein the extension part is an extended section of the first sensing line in a width direction thereof.

11. The array substrate of claim 1 , wherein the semiconductor layer comprises a reserve layer on which the data lines are formed.

12. The array substrate of claim 1 , wherein the plurality of first photosensitive elements and the plurality of second photosensitive elements are formed by noncrystalline silicon material.

13. An optical touch screen comprising the array substrate as recited in claim 1 .

14. The optical touch screen of claim 13 , further comprising a color filter substrate comprising black matrix, wherein when viewed from a thickness direction of the optical touch screen the black matrix does not overlap the plurality of first photosensitive elements and the plurality of second photosensitive elements.

15. A display device comprising the optical touch screen as recited in claim 1 .

Assignees

• Boe Technology Group Co Ltd
• Beijing Boe Display Tech Co

Inventors

• Bai Jinchao
• Kuo Tsungchieh
• Ding Xiangqian
• Liu Yao
• Liu Xiaowei
• Chen Xi

Classifications

• G06F2203/04103

  Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices · CPC title

• G06F3/0412 Primary

  Digitisers structurally integrated in a display · CPC title

• G02F2001/136236

  Physics · mapped topic

• G06F3/0421

  by interrupting or reflecting a light beam, e.g. optical touch-screen · CPC title

• G02F1/136286

  Wiring, e.g. gate line, drain line · CPC title