Method of fabricating semiconductor devices

Patent metadata

Field	Value
Publication number	US-10319805-B2
Application number	US-201715626271-A
Country	US
Kind code	B2
Filing date	Jun 19, 2017
Priority date	Oct 18, 2016
Publication date	Jun 11, 2019
Grant date	Jun 11, 2019

Abstract

Provided is a method of fabricating a semiconductor device. The method includes forming an oxide film on a target layer, forming a first mask film on the oxide film, wherein the first mask film contains a semiconductor material and has a first thickness and a first etch selectivity with respect to the oxide film, forming a second mask film on the first mask film, wherein the second mask film contains a metal and has a second thickness smaller than the first thickness and a second etch selectivity larger than the first etch selectivity with respect to the oxide film, forming a second mask film pattern by patterning the second mask film, forming a first mask film pattern by patterning the first mask film, etching some portions of the oxide film by using the second mask film pattern as an etch mask film, and etching the rest of the oxide film by using the first mask film pattern as an etch mask film to form a hole, wherein the target layer is exposed via the hole.

First claim

What is claimed is:

1. A method of fabricating a semiconductor device, the method comprising:
forming an oxide film on a target layer;
forming a first mask film on the oxide film, wherein the first mask film contains a semiconductor material and has a first thickness and a first etch selectivity with respect to the oxide film;
forming a second mask film on the first mask film, wherein the second mask film contains a metal and has a second thickness smaller than the first thickness and a second etch selectivity with respect to the oxide film larger than the first etch selectivity;
forming a second mask film pattern by patterning the second mask film;
forming a first mask film pattern by patterning the first mask film;
etching first portions of the oxide film by using the second mask film pattern as a first etch mask film; and
etching second portions of the oxide film by using the first mask film pattern as a second etch mask film to form a hole, wherein the target layer is exposed via the hole.

2. The method of claim 1 , further comprising:
completely removing the second mask film pattern after the etching the first portions of the oxide film by using the second mask film pattern as the first etch mask film.

3. The method of claim 2 , wherein the removing the second mask film pattern comprises removing the second mask film pattern by wet etching.

4. The method of claim 1 , wherein the first thickness is between two to three times the second thickness.

5. The method of claim 1 , wherein the oxide film comprises a first oxide film and a second oxide film formed on the first oxide film, and
wherein the forming the oxide film on the target layer comprises:
forming a lower supporter film interposed between the first oxide film and the second oxide film, and
forming an upper supporter film interposed between the second oxide film and the first mask film.

6. The method of claim 5 , wherein each of the upper supporter film and the lower supporter film comprises a silicon oxynitride film.

7. The method of claim 1 , wherein the first mask film comprises a silicon mask film, and the second mask film comprises a metal mask film.

8. The method of claim 7 , wherein the forming the first mask film comprises depositing a silicon and/or a doped silicon.

9. The method of claim 7 , wherein the forming the second mask film comprises depositing at least one of tungsten, tungsten nitride, tungsten carbide, aluminum, aluminum oxide, titanium, titanium oxide and tungsten silicide.

10. The method of claim 1 , further comprising:
forming a lower electrode to fill a second hole;
removing the oxide film;
forming a dielectric layer conformally over the lower electrode and the target layer; and
forming an upper electrode on the dielectric layer.

11. A method of fabricating a semiconductor device, the method comprising:
forming an isolating film to define an active area in a substrate;
forming a gate in the active area;
forming an interlayer insulation film on the substrate, a bit line feature, and a landing pad in the interlayer insulation film, wherein the landing pad is electrically connected to the active area;
forming an oxide film on the interlayer insulation film;
forming a first mask film pattern on the oxide film and a second mask film pattern on the first mask film pattern;
forming a first hole penetrating the oxide film to a depth by using the second mask film pattern;
forming a second hole by etching a remaining portion of the oxide film by using the first mask film pattern, wherein the landing pad is exposed via the second hole; and
forming a capacitor electrically connected to the landing pad via the second hole.

12. The method of claim 11 , wherein the first mask film pattern has a first thickness, and the second mask film pattern has a second thickness smaller than the first thickness.

13. The method of claim 11 , wherein forming the capacitor comprises:
forming a lower electrode to fill the second hole;
removing the oxide film;
forming a dielectric layer conformally over the lower electrode and a target layer; and
forming an upper electrode on the dielectric layer.

14. The method of claim 11 , wherein the first mask film pattern contains an oxide film containing silicon or nitride; and the second mask film pattern contains an oxide film contains metal.

15. The method of claim 11 , wherein the first mask film pattern has a first etch selectivity with respect to the oxide film, and the second mask film pattern has a second etch selectivity with respect to the oxide film, wherein the second etch selectivity is larger than the first etch selectivity.

16. A method of fabricating a semiconductor device, the method comprising:
forming an oxide film on an interlayer insulation film;
forming a first mask film on the oxide film, wherein the first mask film has a first thickness and a first etch selectivity with respect to the oxide film;
forming a second mask film on the first mask film, wherein the second mask film has a second thickness and a second etch selectivity with respect to the oxide film;
forming a second mask film pattern by patterning the second mask film;
forming a first mask film pattern by patterning the first mask film;
forming a first hole penetrating the oxide film to a depth by using the second mask film pattern as a first etch mask;
forming a second hole by etching a remaining portion of the oxide film by using the first mask film pattern as a second etch mask, wherein a landing pad in the interlayer insulation film is exposed via the second hole; and
forming a capacitor electrically connected to the landing pad via the second hole,
wherein the first thickness is larger than the second thickness and the first etch selectivity is smaller than the second etch selectivity.

17. The method of claim 16 , wherein forming the capacitor comprises:
forming a lower electrode to fill the second hole;
removing the oxide film;
forming a dielectric layer conformally over the lower electrode and a stopping insulation film; and
forming an upper electrode on the dielectric layer.

18. The method of claim 16 , wherein the oxide film comprises a first oxide film and a second oxide film formed on the first oxide film, and
wherein the forming the oxide film on the interlayer insulation film comprises:
forming a lower supporter film between the first oxide film and the second oxide film, and
forming an upper supporter film between the second oxide film and the first mask film.

19. The method of claim 16 , wherein the first mask film comprises a silicon mask film, and wherein the forming the first mask film comprises depositing a silicon and/or a doped silicon.

20. The method of claim 16 , wherein the second mask film comprises a metal mask film, and wherein the forming the second mask film comprises depositing at least one of tungsten, tungsten nitride, tungsten carbide, aluminum, aluminum oxide, titanium, titanium oxide and tungsten silicide.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Yoon Jun Ho
• Lee Won Chul
• Kim Sung Yeon
• Park Jae Hong
• Park Chan Hoon
• Jang Yong Moon
• Han Je Woo

Classifications

• H10P50/642

  Chemical etching · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P76/40

  of masks comprising inorganic materials · CPC title

• H10P50/282

  of inorganic materials · CPC title

• H10P50/73

  using masks for insulating materials · CPC title