Method of manufacturing semiconductor device

Patent metadata

Field	Value
Publication number	US-9236291-B2
Application number	US-201514798284-A
Country	US
Kind code	B2
Filing date	Jul 13, 2015
Priority date	Oct 18, 2012
Publication date	Jan 12, 2016
Grant date	Jan 12, 2016

Abstract

A method of manufacturing a semiconductor device, including (a) forming an interlayer insulating film over a semiconductor substrate; (b) forming a third hard mask film over the interlayer insulating film; (c) forming a second hard mask film over the third hard mask film; (d) forming a first hard mask film over the second hard mask film; (e) after the step (d), forming a first opening in the first hard mask film and a second opening in the second hard mask film by etching the first and second hard mask films, respectively; (f) after the step (e), etching the first hard mask film so as to expand the first opening; and (g) after the step (f), etching the third hard mask film and a part of the interlayer insulating film in the second opening by using the second hard mask film as a mask.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device, comprising:
(a) forming an interlayer insulating film over a semiconductor substrate;
(b) forming a third hard mask film over the interlayer insulating film;
(c) forming a second hard mask film over the third hard mask film;
(d) forming a first hard mask film over the second hard mask film;
(e) after the step (d), forming a first opening in the first hard mask film and a second opening in the second hard mask film by etching the first and second hard mask films, respectively;
(f) after the step (e), etching the first hard mask film so as to expand the first opening;
(g) after the step (f), etching the third hard mask film and a part of the interlayer insulating film in the second opening by using the second hard mask film as a mask;
(h) after the step (g), etching the second hard mask film in the first opening in order to expand the second opening by using the first hard mask film as a mask;
(i) after the step (h), etching the third hard mask film and the interlayer insulating film by using the first and second hard mask films as a mask, thereby a trench and a via hole are formed in the interlayer insulating film; and
(j) embedding a conductive film in the trench and the via hole,
wherein the interlayer insulating film has a dielectric constant less than a dielectric constant of a silicon oxide, and
wherein each of the first, second and third hard mask films is formed of a different material from the interlayer insulating film.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein each of the steps (e) and (f) is performed with a resist film, and
wherein each of the steps (g), (h) and (i) is performed without a resist film.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein each of the first and third hard mask films includes an insulating film, and wherein the second hard mask film includes a metal film, an amorphous silicon film or a polycrystalline silicon film.

4. The method of manufacturing a semiconductor device according to claim 3 , wherein the first hard mask film is formed of SiO2, SiN, SiC or SiCN, and
wherein the third hard mask film is formed of SiO2.

5. The method of manufacturing a semiconductor device according to claim 1 , wherein each of the first and third hard mask films includes a metal film, an amorphous silicon film or a polycrystalline silicon film, and
wherein the second hard mask film includes an insulating film.

6. The method of manufacturing a semiconductor device according to claim 5 , wherein the first hard mask film is formed of W, WSi, WN or TiW.

7. The method of manufacturing a semiconductor device according to claim 1 , wherein the interlayer insulating film includes Si, C and O.

Assignees

• Renesas Electronics Corp

Inventors

• Usami Tatsuya

Classifications

• H10P76/4085

  characterised by the processes involved to create the masks · CPC title

• H10P76/405

  characterised by their composition, e.g. multilayer masks · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title