Multi-directional self-aligned multiple patterning

Patent metadata

Field	Value
Publication number	US-10199270-B2
Application number	US-201715605327-A
Country	US
Kind code	B2
Filing date	May 25, 2017
Priority date	May 25, 2017
Publication date	Feb 5, 2019
Grant date	Feb 5, 2019

Abstract

Interconnect structures and methods of fabricating an interconnect structure. First and second non-mandrel interconnects are formed in an interlayer dielectric layer. The first non-mandrel interconnect and the second non-mandrel interconnect have respective side surfaces that extend in a first direction. The connector interconnect extends in a second direction transverse to the first direction from the side surface of the first non-mandrel interconnect to the side surface of the second non-mandrel interconnect.

First claim

What is claimed is:

1. A self-aligned multi-patterning structure comprising:
an interlayer dielectric layer;
a first non-mandrel interconnect embedded in the interlayer dielectric layer, the first non-mandrel interconnect having a side surface that extends in a first direction;
a second non-mandrel interconnect embedded in the interlayer dielectric layer, the second non-mandrel interconnect having a side surface that extends in the first direction; and
a connector interconnect extending in a second direction transverse to the first direction from the side surface of the first non-mandrel interconnect to the side surface of the second non-mandrel interconnect.

2. The self-aligned multi-patterning structure of claim 1 further comprising:
a first mandrel interconnect; and
a second mandrel interconnect,
wherein the first mandrel interconnect and the second mandrel interconnect are laterally arranged in the interlayer dielectric layer between the side surface of the first non-mandrel interconnect and the side surface of the second non-mandrel interconnect.

3. The self-aligned multi-patterning structure of claim 2 wherein the first mandrel interconnect has an end surface, the second mandrel interconnect has an end surface spaced from the end surface of the first mandrel interconnect by a gap, and the connector interconnect extends through the gap between the side surface of the first non-mandrel interconnect and the side surface of the second non-mandrel interconnect.

4. The self-aligned multi-patterning structure of claim 3 wherein a first portion of the interlayer dielectric layer is located between the connector interconnect and the end surface of the first mandrel interconnect, and a second portion of the interlayer dielectric layer is located between the connector interconnect and the end surface of the first mandrel interconnect.

5. The self-aligned multi-patterning structure of claim 4 wherein the gap has an end-to-end distance between the end surface of the first mandrel interconnect and the end surface of the second mandrel interconnect, the connector interconnect has a first width, and the first portion of the interlayer dielectric layer and the second portion of the interlayer dielectric layer have a second width given by one-half of a difference between the end-to-end distance and the first width.

6. The self-aligned multi-patterning structure of claim 3 wherein the gap has an end-to-end distance between the end surface of the first mandrel interconnect and the end surface of the second mandrel interconnect, and the end-to-end distance is greater than or equal to 70 nanometers.

7. The self-aligned multi-patterning structure of claim 6 wherein the connector interconnect is embedded in the interlayer dielectric layer between the side surface of the first non-mandrel interconnect and the side surface of the second non-mandrel interconnect.

8. The self-aligned multi-patterning structure of claim 1 wherein the connector interconnect has a width that is greater than or equal to 15 nanometers.

9. The self-aligned multi-patterning structure of claim 1 wherein the first non-mandrel interconnect, the second non-mandrel interconnect, and the connector interconnect are arranged in a first metallization (M0) level.

10. The self-aligned multi-patterning structure of claim 1 further comprising:
a test pad connected with the first non-mandrel interconnect.

11. A method of forming a self-aligned multi-patterning structure, the method comprising:
forming a first non-mandrel interconnect and a second non-mandrel interconnect in an interlayer dielectric layer, wherein the first non-mandrel interconnect has a side surface that extends in a first direction and the second non-mandrel interconnect has a side surface that extends in the first direction; and
forming a connector interconnect in the interlayer dielectric layer that extends in a second direction transverse to the first direction from the side surface of the first non-mandrel interconnect to the side surface of the second non-mandrel interconnect.

12. The method of claim 11 further comprising:
forming a first mandrel interconnect and a second mandrel interconnect arranged between the side surface of the first non-mandrel interconnect and the side surface of the second non-mandrel interconnect,
wherein the connector interconnect extend surfaces through a gap between an end surface of the first mandrel interconnect and an end surface of the second mandrel interconnect.

13. The method of claim 12 wherein the gap has a width that is greater than or equal to 70 nanometers.

14. The method of claim 11 further comprising:
forming a mandrel on the interlayer dielectric layer;
forming a cut in the mandrel to define a first cut mandrel with a first end surface and a second cut mandrel with a second end surface separated from the first end surface by a gap; and
transferring a portion of the cut to the interlayer dielectric layer with an etching process to form a first trench,
wherein the connector interconnect is formed by filling the first trench with a conductor.

15. The method of claim 14 further comprising:
forming a first sidewall spacer on the first end surface of the first cut mandrel; and
forming a second sidewall spacer on the second end surface of the second cut mandrel,
wherein the second sidewall spacer is spaced from the first sidewall spacer by a non-mandrel space.

16. The method of claim 15 wherein the interlayer dielectric layer is etched by the etching process over an area of the non-mandrel space to form the first trench.

17. The method of claim 15 wherein the first sidewall spacer is further formed on opposite side surfaces of the first cut mandrel, and forming the first non-mandrel interconnect and the second non-mandrel interconnect in the interlayer dielectric layer comprises:
forming a second trench and a third trench in the interlayer dielectric layer over respective areas separated from each other by the first cut mandrel and the first sidewall spacer on the opposite side surfaces of the first cut mandrel; and
filling the second trench and the third trench with the conductor to respectively form the first non-mandrel interconnect and the second non-mandrel interconnect.

18. The method of claim 14 wherein the gap has a width that is greater than or equal to 70 nanometers.

19. The method of claim 14 wherein the first trench has a width that is greater than or equal to 15 nanometers.

20. The method of claim 11 further comprising:
connecting the first non-mandrel interconnect with a test pad.

Assignees

• Globalfoundries Inc

Inventors

• Bombardier Colin
• He Ming
• Chauhan Vikrant
• KM MAHALINGAM Anbu Selvam
• Donegan Keith

Classifications

• H10P74/273

  Interconnections for measuring or testing, e.g. probe pads · CPC title

• H10W20/43

  Layouts of interconnections · CPC title

• H10W20/42

  Vias, e.g. via plugs · CPC title

• H10W70/65

  Shapes or dispositions of interconnections · CPC title

• H10W20/0698

  Local interconnections · CPC title