Self-aligned multiple spacer patterning schemes for advanced nanometer technology

Patent metadata

Field	Value
Publication number	US-9548201-B2
Application number	US-201514730194-A
Country	US
Kind code	B2
Filing date	Jun 3, 2015
Priority date	Jun 20, 2014
Publication date	Jan 17, 2017
Grant date	Jan 17, 2017

Abstract

The present disclosure provides forming nanostructures with precision dimension control and minimum lithographic related errors for features with dimension under 14 nanometers and beyond. A self-aligned multiple spacer patterning (SAMSP) process is provided herein and the process utilizes minimum lithographic exposure process, but rather multiple deposition/etching process to incrementally reduce feature sizes formed in the mask along the manufacturing process, until a desired extreme small dimension nanostructures are formed in a mask layer.

First claim

What is claimed is:

1. An interconnection structure comprising:
a material layer disposed on a substrate;
a first patterned mask layer disposed on the material layer;
a second patterned mask layer disposed on the material layer leaning against sidewalls of the first patterned mask layer; and
a third patterned mask layer disposed on the material layer leaning against sidewalls of the second patterned mask layer, the first, second and third patterned mask layers formed on the material layer in combination defining a first group of opening having a dimension less than 20 nm, wherein the first patterned mask layer is fabricated from a material different from that of the second and the third patterned mask layers.

2. The interconnection structure of claim 1 , wherein a second group of openings are defined between the first patterned mask layer and the third patterned mask layer when the second patterned mask layer is removed from the substrate.

3. The interconnection structure of claim 2 , wherein the second group of openings has a dimension less than 14 nm.

4. The interconnection structure of claim 3 , further comprising:
a third group of openings formed in the material layer transferred from the second group of openings when the second patterned mask layer is removed from the substrate.

5. The interconnection structure of claim 4 , wherein the third group of openings has a dimension less than 14 nm.

6. The interconnection structure of claim 1 , wherein the first patterned mask layer is a polysilicon or amorphous silicon layer.

7. The interconnection structure of claim 1 , wherein the second patterned mask layer is silicon nitride and the third patterned mask layer is amorphous carbon.

8. A method for forming openings in a material layer, comprising:
forming a first patterned mask layer on a material layer disposed on a substrate;
forming a second patterned mask layer on the material layer leaning on sidewalls of the first patterned mask layer;
forming a third patterned mask layer on the material layer leaning on sidewalls of the second patterned mask layer; and
selectively removing the first patterned mask layer to define a first group of openings with a dimension less than 14 nm.

9. The method of claim 8 , wherein the first patterned mask layer is fabricated from a material different from that of the second patterned mask layer and the third patterned mask layer.

10. The method of claim 8 , wherein forming a third patterned mask layer further comprising:
forming a fourth patterned mask layer on the material layer leaning on sidewalls of the third patterned mask layer.

11. The method of claim 10 , further comprising:
removing the first and the third patterned mask layer from the substrate to define the first group of the openings.

12. The method of claim 11 , further comprising:
selectively etching the material layer using the first group of openings defined by the first and the third patterned mask layers as an etching mask to form a second group of openings in the material layer.

13. The method of claim 8 , further comprising:
selectively etching the material layer using the first group of openings defined by the first patterned mask layer as an etching mask to form a second group of openings in the material layer.

14. The method of claim 8 , wherein the first patterned mask layer is a polysilicon or amorphous silicon layer, and the second patterned mask layer is silicon nitride and the third patterned mask layer is amorphous carbon.

Assignees

• Applied Materials Inc

Inventors

• Zhang Ying
• Mitra Uday
• Gopalraja Praburam
• Nemani Srinivas D
• Chung Hua

Classifications

• H10P76/4085 Primary

  characterised by the processes involved to create the masks · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10W20/089

  using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title

• H10P76/405 Primary

  characterised by their composition, e.g. multilayer masks · CPC title