Plating method, plated component, and plating system

US10179950B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10179950-B2
Application numberUS-201615184215-A
CountryUS
Kind codeB2
Filing dateJun 16, 2016
Priority dateJun 19, 2015
Publication dateJan 15, 2019
Grant dateJan 15, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Reliability of a plating process and reliability of a component manufactured through the plating process can be improved by suppressing peeling between plating layers formed by electroless plating. In a plating method, a plated component manufactured by the plating method, and a plating system 1 configured to manufacture the plated component by the plating method, a second electroless plating layer 39 , which is made of a copper alloy and formed by the electroless plating, is formed on a surface of a first electroless plating layer 38 formed by the electroless plating. The first electroless plating layer 38 is a barrier layer configured to suppress diffusion of copper and is made of cobalt or a cobalt alloy. The second electroless plating layer 39 is a seed layer for forming an electrolytic plating layer of copper on a surface thereof and is made of an alloy of copper and nickel.

First claim

Opening claim text (preview).

We claim: 1. A plating method, comprising: forming a recess at a position of a substrate where a silicon-through electrode is to be formed; forming, by performing a first electroless plating, a first electroless plating layer made of cobalt or a cobalt alloy on a surface of the recess, said first electroless plating being performed only once to form the first electroless plating layer; and forming, by performing a second electroless plating, a second electroless plating layer made of an alloy of a copper and a nickel on an upper surface of the first electroless plating layer such that the first electroless plating layer is suppressed from being eroded by a copper and an adhesivity between the first electroless plating layer and the second electroless plating layer is enhanced; and forming an electrolytic plating layer made of a copper on a surface of the second electroless plating layer, wherein after the electrolytic plating layer is formed on the surface of the second electroless plating, the second electroless plating layer serves as a buffer layer. 2. The plating method of claim 1 , wherein the first electroless plating layer is a barrier layer configured to suppress diffusion of copper. 3. The plating method of claim 1 , wherein the second electroless plating layer is a seed layer for forming an electrolytic plating layer of copper on a surface thereof. 4. A plated component, comprising: a recess formed at a position of a substrate where a silicon-through electrode is to be formed; a first electroless plating layer made of cobalt or a cobalt alloy formed on a surface of the recess formed by performing a first electroless plating, said first electroless plating being performed only once to form the first electroless plating layer; a second electroless plating layer made of an alloy of a copper and a nickel and formed on an upper surface of the first electroless plating layer by performing a second electroless plating such that the first electroless plating layer is suppressed from being eroded by a copper and an adhesivity between the first electroless plating layer and the second electroless plating layer is enhanced; and an electrolytic plating layer made of a copper and formed on a surface of the second electroless plating layer, wherein after the electrolytic plating layer is formed on the surface of the second electroless plating, the second electroless plating layer serves as a buffer layer. 5. The plated component of claim 4 , wherein the first electroless plating layer is a barrier layer configured to suppress diffusion of copper. 6. The plated component of claim 4 , wherein the second electroless plating layer is a seed layer for forming an electrolytic plating layer of copper on a surface thereof. 7. A plating system, comprising: a recess forming apparatus configured to form a recess at a position of a substrate where a silicon-through electrode is to be formed; a first electroless plating layer forming apparatus configured to form a first electroless plating layer made of cobalt or a cobalt alloy on a surface of the recess by performing a first electroless plating, said first electroless plating being performed only once to form the first electroless plating layer; a second electroless plating layer forming apparatus configured to form a second electroless plating layer, which is made of an alloy of a copper and a nickel, on an upper surface of the first electroless plating layer by performing a second electroless plating such that the first electroless plating layer is suppressed from being eroded by a copper and an adhesivity between the first electroless plating layer and the second electroless plating layer is enhanced; and an electrolytic plating layer forming apparatus configured to form an electrolytic plating layer made of a copper on a surface of the second electroless plating layer, wherein after the electrolytic plating layer is formed on the surface of the second electroless plating, the second electroless plating layer serves as a buffer layer.

Assignees

Inventors

Classifications

  • comprising use of blind vias during the manufacture · CPC title

  • characterised by the filling method or the material of the conductive fill · CPC title

  • using a liquid · CPC title

  • comprising multiple stacked seed or nucleation layers · CPC title

  • in openings in dielectrics · CPC title

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Frequently asked questions

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What does patent US10179950B2 cover?
Reliability of a plating process and reliability of a component manufactured through the plating process can be improved by suppressing peeling between plating layers formed by electroless plating. In a plating method, a plated component manufactured by the plating method, and a plating system 1 configured to manufacture the plated component by the plating method, a second electroless plating…
Who is the assignee on this patent?
Tokyo Electron Ltd
What technology area does this patent fall under?
Primary CPC classification C23C18/1651. Mapped technology areas include Chemistry & Metallurgy.
When was this patent published?
Publication date Tue Jan 15 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).