Method of controlling threshold of transistor and method of manufacturing semiconductor device

US10153169B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10153169-B2
Application numberUS-201715423460-A
CountryUS
Kind codeB2
Filing dateFeb 2, 2017
Priority dateFeb 2, 2016
Publication dateDec 11, 2018
Grant dateDec 11, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

In a method of controlling a threshold of a transistor, a gate insulating film is formed in a channel region of a metal-oxide-semiconductor (MOS) transistor on a main surface of a semiconductor substrate. A first electrode layer is formed on the gate insulating film and a second electrode layer containing a work function adjusting metal is formed on the first electrode layer. Thereafter, an oxidation treatment or nitridation treatment using a microwave plasma processing apparatus is performed to inactivate the work function adjusting metal, thereby executing a threshold control of the MOS transistor.

First claim

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What is claimed is: 1. A method of fabricating a transistor with a controlled threshold voltage, the method comprising: forming a gate insulating film in channel regions of a metal-oxide-semiconductor (MOS) transistor on a main surface of a semiconductor substrate; forming a first electrode layer on the gate insulating film; forming a second electrode layer containing a work function adjusting metal on the first electrode layer; and thereafter, controlling the threshold voltage of the MOS transistor by performing an oxidation treatment or a nitridation treatment on the second electrode layer by using a microwave plasma processing apparatus to inactivate the work function adjusting metal. 2. The method of claim 1 , wherein the second electrode layer comprises Al as the work function adjusting metal. 3. The method of claim 2 , wherein the gate insulating film is a HfO 2 film, the first electrode layer is a TiN film, and the second electrode layer is formed of a TiAl film. 4. The method of claim 1 , wherein the microwave plasma processing apparatus comprises a planar antenna having slots, wherein the performing the oxidation treatment or the nitridation treatment comprises: transmitting microwaves of a predetermined power through the slots of the planar antenna and a microwave transmission plate made of a dielectric material to introduce the microwaves into a processing chamber in which the semiconductor substrate is disposed, and oxidizing or nitriding the second electrode layer of the semiconductor substrate by using a microwave plasma generated by the microwaves. 5. The method of claim 1 , wherein the microwave plasma processing apparatus comprises a plurality of microwave radiation mechanisms, each including; a tuner perform impedance matching; a planar antenna having slots for radiating the supplied microwaves; and a microwave transmission plate made of a dielectric material disposed adjacent to the planar antenna, and wherein the performing the oxidation treatment or the nitridation treatment comprises: transmitting microwaves of a predetermined power are transmitted through the slots and the microwave transmission plates of the microwave radiation mechanisms and introducing the microwaves into a processing chamber in which the semiconductor substrate is disposed; and oxidizing or nitriding the second electrode layer of the semiconductor substrate by using a microwave plasma generated by the microwaves. 6. The method of claim 5 , wherein the second electrode layer has a thickness of 3 nm or less, and the microwave plasma is used for the oxidation treatment. 7. A method of manufacturing a semiconductor device, the method comprising: preparing a semiconductor substrate having on its main surface a first region in which a first conductive type channel is formed and a second region in which a second conductive type channel is formed; forming a gate insulating film in the first region and the second region; forming a first electrode layer on the gate insulating film; forming a second electrode layer comprising a work function adjusting metal on the first electrode layer; and controlling a threshold voltage of the first region by performing an oxidation treatment or a nitridation treatment only on the first region of the second electrode layer by using a microwave plasma processing apparatus to inactivate the work function adjusting metal. 8. The method of claim 7 , wherein the second electrode layer comprises Al as a work function adjusting metal. 9. The method of claim 8 , wherein the gate insulating film is a HfO 2 film, the first electrode layer is a TiN film, and the second electrode layer is formed of a TiAl film. 10. The method of claim 7 , wherein the microwave plasma processing apparatus comprises a planar antenna having slots, and wherein the performing the oxidation treatment or the nitridation treatment comprises: transmitting microwaves of a predetermined power through the slots of the planar antenna and a microwave transmission plate made of a dielectric material to introduce the microwaves into a processing chamber in which the semiconductor substrate is disposed; and oxidizing or nitriding the second electrode layer of the semiconductor substrate by using a microwave plasma generated by the microwaves. 11. The method of claim 7 , wherein the microwave plasma processing apparatus comprises a plurality of microwave radiation mechanisms, each including a tuner operable to perform impedance matching; a planar antenna having slots for radiating the supplied microwaves; and a microwave transmission plate made of a dielectric material adjacent to the planar antenna, and wherein microwaves of a predetermined power are transmitted through the slots and the microwave transmission plates of the microwave radiation mechanisms and introduced into a processing chamber in which the semiconductor substrate is disposed, and the second electrode layer of the semiconductor substrate is oxidized or nitrided by a microwave plasma generated by the microwaves. 12. The method of claim 11 , wherein the second electrode layer has a thickness of 3 nm or less, and the microwave plasma is used for the oxidation treatment. 13. The method of claim 1 , wherein the oxidation treatment or the nitridation treatment is performed when a microwave plasma is generated. 14. The method of claim 7 , wherein the oxidation treatment or the nitridation treatment is performed when a microwave plasma is generated. 15. The method of claim 1 , wherein the channel regions comprise a first region in which a first conductive type channel is formed and a second region in which a second conductive type channel is formed, and the oxidation treatment or the nitridation treatment is performed only on the first region of the second electrode layer to control the threshold voltage of the MOS transistor. 16. The method of claim 1 , wherein the channel regions comprise a first region in which a first conductive type channel is formed and a second region in which a second conductive type channel is formed, and the oxidation treatment or the nitridation treatment is performed on both the first region and the second region, and an amount of oxygen or nitrogen to be added is greater in the first region than in the second region to control the threshold voltage of the MOS transistor.

Assignees

Inventors

Classifications

  • Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

  • the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN (comprising a layer of alloys of Si, Ge or C H10D64/01314) · CPC title

  • Antennas · CPC title

  • Microwave generated discharge (H01J37/32357, H01J37/32366, H01J37/32394, H01J37/32403 take precedence) · CPC title

  • using applied electromagnetic fields, e.g. high frequency or microwave energy (H05H1/26 takes precedence) · CPC title

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What does patent US10153169B2 cover?
In a method of controlling a threshold of a transistor, a gate insulating film is formed in a channel region of a metal-oxide-semiconductor (MOS) transistor on a main surface of a semiconductor substrate. A first electrode layer is formed on the gate insulating film and a second electrode layer containing a work function adjusting metal is formed on the first electrode layer. Thereafter, an oxi…
Who is the assignee on this patent?
Tokyo Electron Ltd
What technology area does this patent fall under?
Primary CPC classification H10D64/01318. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 11 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).