Semiconductor device and method of manufacturing the same

US10115798B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10115798-B2
Application numberUS-201815883571-A
CountryUS
Kind codeB2
Filing dateJan 30, 2018
Priority dateFeb 15, 2017
Publication dateOct 30, 2018
Grant dateOct 30, 2018

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device is provided with: a semiconductor substrate; a first electrode disposed on a surface of the semiconductor device and configured to be soldered to a conductive member; and a second electrode disposed on the surface of the semiconductor device and configured to be wire-bonded to a conductive member. The first electrode includes first, second and third metal layers. The second metal layer is located between the first and third metal layers. A metallic material of the second metal layer is greater in tensile strength than a metallic material of each one of the first metal layer and the third metal layer. The second electrode includes a layer made of a same metallic material as one of the first metal layer and the third metal layer, and does not include any layers made of a same metallic material as the second metal layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a semiconductor substrate; a first electrode disposed on a surface of the semiconductor device and configured to be soldered to a conductive member; and a second electrode disposed on the surface of the semiconductor device and configured to be wire-bonded to a conductive member, wherein the first electrode comprises a first metal layer, a second metal layer, and a third metal layer, the second metal layer being located between the first metal layer and the third metal layer, and a metallic material of the second metal layer being greater in tensile strength than a metallic material of each one of the first metal layer and the third metal layer, and the second electrode comprises a layer constituted of a same metallic material as one of the first metal layer and the third metal layer, and does not comprise any layers constituted of a same metallic material as the second metal layer. 2. The semiconductor device according to claim 1 , wherein the semiconductor substrate comprises an element region in which at least one semiconductor element is provided and a peripheral region located around the element region, and the first electrode is located on the element region and the second electrode is located on the peripheral region. 3. The semiconductor device according to claim 1 , wherein the second electrode is constituted only of the same metallic material as the first metal layer and the third metal layer, and does not include any intermediate layers constituted of other metallic material. 4. The semiconductor device according to claim 1 , wherein the first metal layer and the third metal layer are constituted of the same metallic material as each other. 5. The semiconductor device according to claim 1 , wherein the second metal layer is constituted of titanium nitride. 6. A method of manufacturing a semiconductor device that comprises: a semiconductor substrate; a first electrode disposed on a surface of the semiconductor device and configured to be soldered to a conductive member; and a second electrode disposed on the surface of the semiconductor device and configured to be wire-bonded to a conductive member, the method comprising: forming a first metal film on the surface of the semiconductor substrate, the first metal film being formed both on a first area where the first electrode is to be formed and on a second area where the second electrode is to be formed; forming a second metal film on a surface of the first metal film, the second metal film being formed both in the first area and in the second area, and a metallic material of the second metal film being greater in tensile strength than a metallic material of the first metal film; removing a portion of the second metal film located within the second area; and forming a third metal film on a surface of the second metal film, the third metal film being formed both in the first area and in the second area, the third metal film being formed directly on the surface of the first metal film in the second area, and a metallic material of the third metal film being lower in tensile strength than the metallic material of the second metal film.

Assignees

Inventors

Classifications

  • of conductive or resistive materials · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • relative to the surface, e.g. recessed, protruding · CPC title

  • Ultrasonic bonding, e.g. thermosonic bonding · CPC title

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Frequently asked questions

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What does patent US10115798B2 cover?
A semiconductor device is provided with: a semiconductor substrate; a first electrode disposed on a surface of the semiconductor device and configured to be soldered to a conductive member; and a second electrode disposed on the surface of the semiconductor device and configured to be wire-bonded to a conductive member. The first electrode includes first, second and third metal layers. The seco…
Who is the assignee on this patent?
Toyota Motor Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W42/121. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 30 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).