Switching device

US9865728B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9865728-B2
Application numberUS-201715425286-A
CountryUS
Kind codeB2
Filing dateFeb 6, 2017
Priority dateMar 9, 2016
Publication dateJan 9, 2018
Grant dateJan 9, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A switching device including a semiconductor substrate including a trench (gate electrode) extending in a mesh shape is provided, and the upper surface of the semiconductor substrate is covered by the interlayer insulating film. Within an element range a contact hole is provided in an interlayer insulating film above each cell region while within a surrounding range an entire upper surface of each cell region is covered by the interlayer insulating film. The first metal layer covers the interlayer insulating film, and has recesses above the contact holes. The insulating protective film covers an outer peripheral side portion of the first metal layer within the surrounding range. The second metal layer covers the first metal layer within an opening of the insulating protective film. Within the surrounding range, a second conductivity-type region extending to below lower ends of the trench and is electrically connected to the body region, is provided.

First claim

Opening claim text (preview).

What is claimed is: 1. A switching device comprising: a semiconductor substrate; a gate insulating film; a gate electrode; an interlayer insulating film; a first metal layer; a second metal layer, and an insulating protective film, wherein, a trench extending in a mesh-shape is provided in an upper surface of the semiconductor substrate, the gate insulating film covers an inner surface of the trench, the gate electrode is disposed inside the trench, the gate electrode being insulated from the semiconductor substrate by the gate insulating film, when each region of the semiconductor substrate surrounded by the trench in a plan view of the upper surface is termed as a cell region, a range including a plurality of the cell regions in the plan view of the upper surface as a first element range, a range surrounding a periphery of the first element range in the plan view of the upper surface and including a plurality of the cell regions being termed as a surrounding range, the interlayer insulating film covering the upper surface and the gate electrode in a range across the first element range and the surrounding range, within the first element range, a contact hole is provided in the interlayer insulating film above each of the cell regions, within the surrounding range, the interlayer insulating film covers an entirety of the upper surface above the cell regions, the first metal layer covers the interlayer insulating film, being insulated from the gate electrode by the interlayer insulating film, being in contact with the upper surface within the contact hole, a recess is provided on a surface of the first metal layer above the contact hole, the insulating protective film covers an outer peripheral side portion of the first metal layer in the surrounding range, an opening is provided in the insulating protective film in a range wider than the first element range and including the first element range, the second metal layer is in contact with the surface of the first metal layer in the opening and is in contact with a side surface of the opening, the second metal layer having a linear expansion coefficient smaller than a linear expansion coefficient of the first metal layer, each of the cell regions within the first element range comprises: a first region of a first conductivity type, being in contact with the first metal layer and the gate insulating film, and a body region of a second conductivity type, being in contact with the first metal layer and being in contact with the gate insulating film below the first region, each cell region within the surrounding range comprises a second conductivity type peripheral region of the second conductivity type, the second conductivity type peripheral region extending to below a lower end of the trench within the surrounding range and being electrically connected to the body region, and the semiconductor substrate comprises a second region of the first conductivity type, the second region being disposed across below the body region and below the second conductivity type peripheral region, being in contact with the gate insulating film below the body region, and being separated from the first regions by the body region. 2. The switching device of claim 1 , wherein a second conductivity-type impurity density of the second conductivity-type peripheral region is higher than a second conductivity-type impurity density of a portion of the body region positioned below the first regions. 3. The switching device of claim 1 , wherein a guard ring is provided outside of a range where the trench is provided, the guard ring being exposed on the upper surface, surrounding the range where the trench is provided, and being electrically separated from the first metal layer. 4. The switching device of claim 3 , wherein the switching device comprises a second element range surrounding a periphery of the surrounding range in the plan view of the upper surface, the second element range including a plurality of the cell regions, within the second element range, a contact hole is provided in the interlayer insulation film above each of the cell regions, the first metal layer is in contact with the upper surface in the contact hole within the second element range, the insulating protective film covers the first metal layer within the second element range, the second metal layer is disposed across from on the first metal layer in the opening and to on the insulating protective film, an outer peripheral side end of the second metal layer is positioned on an inner peripheral side relative to an outer peripheral side end of the first metal layer, and each of the cell regions in the second element range includes the first region and the body region.

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What does patent US9865728B2 cover?
A switching device including a semiconductor substrate including a trench (gate electrode) extending in a mesh shape is provided, and the upper surface of the semiconductor substrate is covered by the interlayer insulating film. Within an element range a contact hole is provided in an interlayer insulating film above each cell region while within a surrounding range an entire upper surface of e…
Who is the assignee on this patent?
Toyota Motor Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L29/7813. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 09 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).