Air gap spacer formation for nano-scale semiconductor devices

US10115629B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10115629-B2
Application numberUS-201715789416-A
CountryUS
Kind codeB2
Filing dateOct 20, 2017
Priority dateAug 9, 2016
Publication dateOct 30, 2018
Grant dateOct 30, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.

First claim

Opening claim text (preview).

We claim: 1. A semiconductor device, comprising: a first metallic structure and a second metallic structure disposed adjacent to each other on a substrate with a space disposed between the first and second metallic structures, wherein the first metallic structure comprises a gate structure of a transistor and wherein the second metallic structure comprises a source/drain contact; and a dielectric capping layer formed over the first and second metallic structures to form an air gap in the space between the first and second metallic structures; wherein an upper portion of the air gap is disposed above an upper surface the first metallic structure and below an upper surface of the second metallic structure; and wherein a bottom portion of the air gap is disposed below a bottom surface of the second metallic structure. 2. The device of claim 1 , wherein the dielectric capping layer comprises a low-k dielectric material having a dielectric constant that is about 5.0 or less. 3. The device of claim 1 , wherein the dielectric capping layer comprises at least one of SiCOH, porous p-SiCOH, SiCN, SiNO, carbon-rich SiCNH, SiC, p-SiCNH, and SiN. 4. The device of claim 1 , further comprising a conformal liner layer formed on surfaces of the first and second metallic structures in the space between the first and second metallic structures. 5. The device of claim 1 , further comprising: a BEOL (back-end-of-line) interconnect structure comprising a first metal line and a second metal line formed in an ILD (interlevel dielectric) layer, wherein the first metal line and the second metal line are disposed adjacent to each other with a space disposed between the first and second metal lines; a second dielectric capping layer formed over the first and second metal lines to form an air gap in the space between the first and second metallic lines; wherein an upper portion of the air gap is disposed above upper surfaces of the first and second metal lines. 6. The device of claim 5 , wherein the second dielectric capping layer comprises a low-k dielectric material having a dielectric constant that is about 5.0 or less. 7. The device of claim 5 , wherein the second dielectric capping layer comprises at least one of SiCOH, porous p-SiCOH, SiCN, SiNO, carbon-rich SiCNH, SiC, p-SiCNH, and SiN. 8. The device of claim 5 , further comprising a conformal liner layer within the space between the first and second metal lines.

Assignees

Inventors

Classifications

  • the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

  • the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC · CPC title

  • being a silicon carbide or silicon carbonitride and not containing oxygen, e.g. SiC or SiC:H · CPC title

  • in the presence of a plasma [PECVD] · CPC title

  • H10W20/48Primary

    Insulating materials thereof · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10115629B2 cover?
Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with i…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10W20/48. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 30 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).