Delta modulator with variable feedback gain, analog-to-digital converter including the delta modulator, and communication device including the delta modulator

Patent metadata

Field	Value
Publication number	US-10110248-B2
Application number	US-201715702962-A
Country	US
Kind code	B2
Filing date	Sep 13, 2017
Priority date	Jan 31, 2017
Publication date	Oct 23, 2018
Grant date	Oct 23, 2018

Abstract

A variable feedback gain delta modulator includes group of capacitors commonly connected to a first terminal and are respectively classified into a first capacitor group and a second capacitor group; a comparator for sequentially generating n-bit digital output signals based on a voltage of the first terminal; and a switch group including switches respectively connected to the capacitors, wherein the switches are respectively classified into a first switch group and a second switch group respectively connected to the first capacitor group and the second capacitor group, and the first switch group and the second switch group respectively operate according to a first control signal and a second control signal that are determined based on the n-bit digital output signals and the variable feedback gain.

First claim

What is claimed is:

1. A delta modulator comprising:
a capacitor group comprising a plurality of capacitors that are commonly connected to a first terminal, wherein the plurality of capacitors are respectively classified into a first capacitor group and a second capacitor group such that the delta modulator has a variable feedback gain;
a comparator configured to sequentially generate n-bit digital output signals based on a first terminal voltage of the first terminal, wherein n is a positive integer; and
a switch group comprising a plurality of switches that are respectively connected to the plurality of capacitors, wherein the plurality of switches are respectively classified into a first switch group and a second switch group that are respectively connected to the first capacitor group and the second capacitor group, and the first switch group and the second switch group are configured to respectively operate according to a first control signal and a second control signal, the first control signal being determined based on the n-bit digital output signals and the second control signal being determined based on the n-bit digital output signals and the variable feedback gain,
wherein the first control signal corresponds to n-bit previous data in a sampling phase, and corresponds to n-bit current data that is sequentially output in a conversion phase,
wherein the second control signal corresponds to the n-bit previous data in the sampling phase when the variable feedback gain is not less than one, and corresponds to the n-bit current data in the conversion phase when the variable feedback gain is not greater than one.

2. The delta modulator of claim 1 , wherein each of the plurality of switches is configured to selectively connect a corresponding capacitor of the plurality of capacitors to a reference voltage terminal and a ground voltage terminal according to the first control signal and the second control signal, and
wherein a reference voltage level applied to the reference voltage terminal remains uniform in the sampling phase and the conversion phase.

3. The delta modulator of claim 2 , wherein the reference voltage level is a first voltage level in response to the variable feedback gain being less than or equal to one, and
wherein the reference voltage level is a second voltage level corresponding to the first voltage level multiplied by the variable feedback gain in response to the variable feedback gain being greater than one.

4. The delta modulator of claim 1 , wherein a ratio of a first capacitance of the first capacitor group to a second capacitance of the second capacitor group is x:(1−x), wherein x corresponds to the variable feedback gain.

5. The delta modulator of claim 4 , wherein the variable feedback gain multiplied by x corresponds to 1 in response to the variable feedback gain being greater than one, and
wherein x corresponds to the variable feedback gain in response to the variable feedback gain being less than one.

6. The delta modulator of claim 1 , wherein the first control signal and the second control signal are identical to each other as the n-bit previous data in the sampling phase in response to the variable feedback gain being greater than one, and
wherein the first control signal is the n-bit current data that is sequentially output and the second control signal is reset data that is not related to the n-bit current data in the conversion phase.

7. The delta modulator of claim 1 , wherein the first control signal is the n-bit previous data and the second control signal is reset data that is not related to the n-bit previous data in the sampling phase in response to the variable feedback gain being less than one, and
wherein the first control signal and the second control signal are identical to each other as the n-bit current data that is sequentially output in the conversion phase.

8. The delta modulator of claim 1 , wherein the first control signal is identical to the second control signal as the n-bit previous data in the sampling phase in response to the variable feedback gain being equal to one, and
wherein the first control signal is identical to the second control signal as the n-bit current data that is sequentially output in the conversion phase.

9. The delta modulator of claim 1 , further comprising an input switch between the first terminal and an input terminal, the input terminal being configured to receive an analog input voltage,
wherein the input switch is configured to turn on in the sampling phase and turn off in the conversion phase.

10. The delta modulator of claim 1 , further comprising a digital logic configured to:
sequentially receive the n-bit digital output signals from the comparator;
generate the first control signal and the second control signal; and
respectively provide the first control signal and the second control signal, as generated, to the first switch group and the second switch group.

11. An analog-to-digital converter configured to convert an analog input signal into a digital output signal, the analog-to-digital converter comprising:
a delta modulator configured to receive the analog input signal in a sampling phase and output the digital output signal in a conversion phase, the delta modulator having a variable feedback gain,
wherein the delta modulator comprises:
a capacitor group comprising a plurality of capacitors that are commonly connected to a first terminal, wherein the plurality of capacitors are respectively classified into a first capacitor group and a second capacitor group such that the delta modulator has the variable feedback gain;
a comparator configured to sequentially generate the digital output signal based on a voltage of the first terminal, the digital output signal having n bits, wherein n is a positive integer; and
a switch group comprising a plurality of switches respectively connected to the plurality of capacitors, wherein the plurality of switches are respectively classified into a first switch group and a second switch group that are respectively connected to the first capacitor group and the second capacitor group, and the first switch group and the second switch group are configured to respectively operate according to a first control signal and a second control signal, the first control signal being determined based on the n-bit digital output signals and the second control signal being determined based on the n-bit digital output signals and the variable feedback gain,

wherein the first control signal corresponds to n-bit previous data in the sampling phase, and corresponds to n-bit current data that is sequentially output in the conversion phase,
wherein the second control signal corresponds to the n-bit previous data in the sampling phase when the variable feedback gain is not less than one, and corresponds to the n-bit current data in the conversion phase when the variable feedback gain is not greater than one.

12. The analog-to-digital converter of claim 11 , wherein the delta modulator further comprises an input switch configured to receive the analog input signal and provide the analog input signal to the first terminal in the sampling phase.

13. The analog-to-digital converter of claim 11 , wherein the delta modulator further comprises a digital logic configured to:
sequentially receive the digital output signal from the comparator;
generate the first control signal and the second control signal; and
respectively provide the first control signal and the second control signal, as generated, to the first switch group and the second switch group.

14. The analog-to-digital converter of claim 11 , where

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Jae-Hoon
• Lee Jong-Woo
• Lo Chilun
• Oh Seung-Hyun
• Lee Jong-Mi

Classifications

• H03M3/464 Primary

  Details of the digital/analogue conversion in the feedback path · CPC title

• H03M3/436

  characterised by the order of the loop filter, e.g. error feedback type · CPC title

• H03M3/49 Primary

  in feedback mode, i.e. by determining the range to be selected from one or more previous digital output values · CPC title

• H03M3/434

  with multi-level feedback · CPC title

• H03M3/022 Primary

  with adaptable step size, e.g. adaptive delta modulation [ADM] · CPC title