Inductor interconnect

Patent metadata

Field	Value
Publication number	US-10083922-B2
Application number	US-201615359926-A
Country	US
Kind code	B2
Filing date	Nov 23, 2016
Priority date	Nov 23, 2016
Publication date	Sep 25, 2018
Grant date	Sep 25, 2018

Abstract

A device and method of utilizing spiral interconnects for voltage and power regulation are shown. Examples of spiral interconnects include air core inductors. An integrated circuit package attached to a motherboard using spiral interconnects is shown. Methods of attaching an integrated circuit package to a motherboard using spiral interconnects are shown including air core inductors. Methods of attaching spiral interconnects include using electrically conductive adhesive or solder.

First claim

The invention claimed is:

1. A semiconductor device, comprising:
a semiconductor die;
a substrate attached to the semiconductor die;
a number of interconnects coupled between the substrate and a motherboard, and bridging a space between the substrate and the motherboard;
a plurality of spiral interconnects bridging the space between the substrate and the motherboard, the plurality of spiral interconnects located adjacent to the number of interconnects.

2. The semiconductor device of claim 1 , wherein at least one of the plurality of spiral interconnects is an air core inductor.

3. The semiconductor device of claim 1 , wherein all of the plurality of spiral interconnects are air core inductors.

4. The semiconductor device of claim 1 , wherein a subset of the plurality of spiral interconnects are connected in an electrically parallel configuration.

5. The semiconductor device of claim 1 , wherein at least one of the plurality of spiral interconnects is located in a shadow of the semiconductor die.

6. The semiconductor device of claim 1 , further comprising:
a dielectric encapsulating at least one of the plurality of spiral interconnects.

7. The semiconductor device of claim 6 , wherein the dielectric contains magnetic material.

8. The semiconductor device of claim 1 , wherein the plurality of spiral interconnects are all located in a shadow of the semiconductor die.

9. The semiconductor device of claim 1 , wherein the substrate includes a ball grid array (BGA).

10. The semiconductor device of claim 1 , wherein a coil diameter of at least one of the plurality of spiral interconnects is tapered from a first end and a second end of the spiral interconnect and the coil diameter is smallest halfway between the first end and the second end of the spiral interconnect.

11. A semiconductor device, comprising:
a semiconductor die;
a substrate attached to the semiconductor die;
a number of interconnects bridging a space between the substrate and a motherboard; and
an air core inductor interconnect coupled between, and bridging the space between the substrate and the motherboard, the air core inductor interconnect located adjacent to the number of interconnects.

12. The semiconductor device of claim 11 , wherein the air core inductor interconnect is further located in a shadow of the semiconductor die.

13. The semiconductor device of claim 11 , further comprising:
a plurality of air core inductor interconnects.

14. The semiconductor device of claim 13 , wherein the plurality of air core inductor interconnects are further located in a shadow of the semiconductor die.

15. The semiconductor device of claim 13 , wherein a subset of the plurality of air core inductor interconnects are connected in an electrically parallel configuration.

16. The semiconductor device of claim 11 , further comprising:
a dielectric encapsulating the air core inductor interconnect.

17. The semiconductor device of claim 11 , wherein the substrate includes a ball grid array (BGA).

18. A method for attaching a semiconductor device to a motherboard comprising:
attaching a number of interconnects of the semiconductor device to the motherboard including:
soldering at least one of the number of interconnects to the motherboard;
attaching a first end of an air core inductor to an interconnect of the number of interconnects of the semiconductor device; and
bridging a space between the semiconductor device and the motherboard with the air core inductor, and attaching a second end of the air core inductor to the motherboard.

19. The method of claim 18 , wherein the air core inductor is attached to the substrate using a conductive adhesive.

20. The method of claim 18 , wherein the air core inductor is attached to the substrate using solder.

21. The method of claim 19 , further comprising:
flowing a dielectric between the semiconductor device and the motherboard and into the air core inductor.

22. The method of claim 18 , further comprising:
attaching, in an electrically parallel configuration, one end of a plurality of air core inductors to the interconnects of the semiconductor device; and
attaching a second end of the plurality of air core inductors to the motherboard.

Assignees

• Intel Corp

Inventors

• Lim Min Suet
• Kuan Chin Lee
• Goh Eng Huat
• Yong Khang Choong
• Cheah Bok Eng
• Kong Jackson Chung Peng
• Loo Howe Yin

Classifications

• H10W70/644

  Elastic or compliant interconnections, e.g. springs, cantilevers or elastic pads · CPC title

• H10W70/093

  Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps · CPC title

• H10W70/68

  Shapes or dispositions thereof · CPC title

• H10W90/701 Primary

  characterised by the relative positions of pads or connectors relative to package parts · CPC title

• H10W74/131

  the semiconductor body being only partially enclosed · CPC title