Wiring board and semiconductor device

Patent metadata

Field	Value
Publication number	US-9155195-B2
Application number	US-201313873504-A
Country	US
Kind code	B2
Filing date	Apr 30, 2013
Priority date	May 31, 2005
Publication date	Oct 6, 2015
Grant date	Oct 6, 2015

Abstract

A method of fabricating a wiring board includes forming a resist layer, such as a solder or plating resist layer, defining an opening portion on a support board such that a portion of the support board is exposed. An electrode is formed directly on the support board within the opening portion, and the plating resist layer, when used, is removed. An insulating layer is formed on the electrode, as well as the support board or solder resist layer, and a wiring portion connected to the electrode at the insulating layer is also formed. A solder resist layer having an opening portion is then formed on the wiring portion, and the support board is removed to expose a surface of the electrode or a surface of the electrode and insulating layer. Another solder resist layer having an opening portion may then be formed on the exposed surface of the insulating layer.

First claim

We claim:

1. A wiring board, comprising:
an insulating layer;
a first electrode embedded in the insulating layer, the first electrode having a surface exposed from a first surface of the insulating layer and a back surface and side surfaces covered by the insulating layer, the surface of the first electrode being indented relative to the first surface of the insulating layer;
a first solder resist layer provided on the first surface of the insulating layer and having a first o…

Assignees

• Shinko Electric Ind Co

Inventors

• Nakamura Junichi
• Kobayashi Yuji

Classifications

• Y10T29/49155

  Cross-Sectional Technologies · mapped topic

• H05K2201/0949

  Electricity · mapped topic

• H05K3/4007

  Electricity · mapped topic

• Y10T29/49144

  Cross-Sectional Technologies · mapped topic

• H05K3/423

  Electricity · mapped topic