Memory device and semiconductor device
US-9478276-B2 · Oct 25, 2016 · US
US10019025B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10019025-B2 |
| Application number | US-201615219453-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 26, 2016 |
| Priority date | Jul 30, 2015 |
| Publication date | Jul 10, 2018 |
| Grant date | Jul 10, 2018 |
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A semiconductor device or a memory device with low power consumption and a small area is provided. The semiconductor device includes a sense amplifier and a memory cell. The memory cell is provided over the sense amplifier. The sense amplifier includes a first transistor and a second transistor. The memory cell includes a third transistor and a capacitor. The first transistor is a p-channel transistor. The second transistor and the third transistor each include an oxide semiconductor in a channel formation region. The third transistor is preferably provided over the capacitor.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a first circuit comprising a first transistor and a second transistor electrically connected to each other; a first insulating film over the first circuit; and a second circuit over the first insulating film, the second circuit comprising a capacitor and a third transistor electrically connected to each other, wherein the third transistor is positioned over the capacitor, wherein the first transistor is a p-channel type transistor, wherein the second transistor and the third transistor each comprise an oxide semiconductor in a channel formation region, wherein the second circuit is configured to hold a potential, and wherein the first circuit is configured to amplify the potential held in the second circuit. 2. The semiconductor device according to claim 1 , wherein the oxide semiconductor comprises indium and oxygen. 3. The semiconductor device according to claim 1 , wherein the oxide semiconductor comprises indium, zinc, and oxygen. 4. The semiconductor device according to claim 1 , wherein the oxide semiconductor comprises indium, gallium, zinc, and oxygen. 5. The semiconductor device according to claim 1 , comprising a second insulating film between the first transistor and the second transistor, wherein the second transistor is positioned over the first transistor. 6. The semiconductor device according to claim 1 , wherein the first transistor comprises silicon in a channel formation region. 7. The semiconductor device according to claim 1 , comprising a semiconductor substrate, wherein the first transistor comprises a channel formation region in the semiconductor substrate. 8. The semiconductor device according to claim 1 , wherein the capacitor and the channel formation region of the third transistor overlap with each other. 9. A semiconductor device comprising: a first circuit comprising a first transistor and a second transistor electrically connected to each other; a first insulating film over the first circuit; and a second circuit over the first insulating film, the second circuit comprising a capacitor and a third transistor electrically connected to each other, wherein the third transistor is positioned over the capacitor, wherein the first transistor is a p-channel type transistor, wherein the second transistor and the third transistor each comprise an oxide semiconductor in a channel formation region, wherein the second circuit is configured to store data to function as a memory, and wherein the first circuit is configured to amplify a potential of the data stored in the second circuit to function as a sense amplifier of the memory. 10. The semiconductor device according to claim 9 , wherein the oxide semiconductor comprises indium and oxygen. 11. The semiconductor device according to claim 9 , wherein the oxide semiconductor comprises indium, zinc, and oxygen. 12. The semiconductor device according to claim 9 , wherein the oxide semiconductor comprises indium, gallium, zinc, and oxygen. 13. The semiconductor device according to claim 9 , comprising a second insulating film between the first transistor and the second transistor, wherein the second transistor is positioned over the first transistor. 14. The semiconductor device according to claim 9 , wherein the first transistor comprises silicon in a channel formation region. 15. The semiconductor device according to claim 9 , comprising a semiconductor substrate, wherein the first transistor comprises a channel formation region in the semiconductor substrate. 16. The semiconductor device according to claim 9 , wherein the capacitor and the channel formation region of the third transistor overlap with each other. 17. A method for manufacturing a semiconductor device, the method comprising: forming a wiring electrically connected to a capacitor; forming a first insulating film over the wiring; forming a first oxide semiconductor film over the first insulating film; after forming the first oxide semiconductor film, forming an opening in the first insulating film to expose the wiring; after forming the opening, performing a high-density plasma treatment on the first oxide semiconductor film; and forming a conductive film in contact with the first oxide semiconductor film and in contact with the wiring via the opening. 18. The method according to claim 17 , wherein a portion of the wiring exposed from the first insulating film is oxidized by the high-density plasma treatment. 19. The method according to claim 17 , the method comprising: forming a second transistor over a second insulating film positioned over a first transistor; forming a third insulating film over the second transistor; and forming the capacitor over the third insulating film. 20. The method according to claim 19 , wherein the second transistor comprises a second oxide semiconductor film.
characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title
being semiconductor devices · CPC title
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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