Semiconductor device and method for manufacturing the same

US10014414B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10014414-B2
Application numberUS-201414190874-A
CountryUS
Kind codeB2
Filing dateFeb 26, 2014
Priority dateFeb 28, 2013
Publication dateJul 3, 2018
Grant dateJul 3, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A transistor or the like having high field-effect mobility is provided. A transistor or the like having stable electrical characteristics is provided. A semiconductor device including a first oxide semiconductor layer, a second oxide semiconductor layer, a gate insulating film, and a gate electrode which partly overlap with one another is provided. The second oxide semiconductor layer is positioned between the first oxide semiconductor layer and the gate insulating film. The gate insulating film is positioned between the second oxide semiconductor layer and the gate electrode. The first oxide semiconductor layer has fewer oxygen vacancies than those of the second oxide semiconductor layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a semiconductor device, the method comprising the steps of: forming a first oxide semiconductor layer; and forming a second oxide semiconductor layer so that the number of oxygen vacancies in the second oxide semiconductor layer is larger than the number of oxygen vacancies in the first oxide semiconductor layer, wherein the second oxide semiconductor layer is formed over and in contact with the first oxide semiconductor layer, wherein the first oxide semiconductor layer is formed by a sputtering method under a first atmosphere containing oxygen, and wherein the second oxide semiconductor layer is formed by a sputtering method under a second atmosphere having a lower concentration in oxygen than the first atmosphere. 2. The method for manufacturing a semiconductor device, according to claim 1 , wherein the first oxide semiconductor layer and the second oxide semiconductor layer are formed using the same target. 3. The method for manufacturing a semiconductor device, according to claim 2 , wherein an atomic ratio of an element in the first oxide semiconductor layer is different from an atomic ratio of the element in the second oxide semiconductor layer. 4. The method for manufacturing a semiconductor device, according to claim 1 , further comprising the steps of: forming a gate insulating film in contact with the second oxide semiconductor layer; and forming a gate electrode in contact with the gate insulating film. 5. The method for manufacturing a semiconductor device, according to claim 1 , wherein a proportion of oxygen in the second atmosphere is smaller than 10 volume %. 6. The method for manufacturing a semiconductor device, according to claim 1 , wherein the first oxide semiconductor layer and the second oxide semiconductor layer are formed in the same deposition chamber. 7. A method for manufacturing a semiconductor device, the method comprising the steps of: forming a first oxide semiconductor layer; forming a second oxide semiconductor layer so that the number of oxygen vacancies in the second oxide semiconductor layer is larger than the number of oxygen vacancies in the first oxide semiconductor layer; and forming a third oxide semiconductor layer so that the number of oxygen vacancies in the third oxide semiconductor layer is smaller than the number of oxygen vacancies in the second oxide semiconductor layer, wherein the second oxide semiconductor layer is formed over and in contact with the first oxide semiconductor layer, wherein the third oxide semiconductor layer is formed over and in contact with the second oxide semiconductor layer, wherein the first oxide semiconductor layer is formed by a sputtering method under a first atmosphere containing oxygen, wherein the third oxide semiconductor layer is formed by a sputtering method under a second atmosphere containing oxygen, and wherein the second oxide semiconductor layer is formed by a sputtering method under a third atmosphere having a lower concentration in oxygen than the first atmosphere and the second atmosphere. 8. The method for manufacturing a semiconductor device, according to claim 7 , wherein the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer are formed using the same target. 9. The method for manufacturing a semiconductor device, according to claim 8 , wherein an atomic ratio of an element in the first oxide semiconductor layer is different from an atomic ratio of the element in the second oxide semiconductor layer. 10. The method for manufacturing a semiconductor device, according to claim 7 , further comprising the steps of: forming a gate insulating film in contact with the third oxide semiconductor layer; and forming a gate electrode in contact with the gate insulating film. 11. The method for manufacturing a semiconductor device, according to claim 7 , wherein a proportion of oxygen in the third atmosphere is smaller than 10 volume %. 12. The method for manufacturing a semiconductor device, according to claim 7 , wherein the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer are formed in the same deposition chamber.

Assignees

Inventors

Classifications

  • characterised by the gate electrodes · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

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What does patent US10014414B2 cover?
A transistor or the like having high field-effect mobility is provided. A transistor or the like having stable electrical characteristics is provided. A semiconductor device including a first oxide semiconductor layer, a second oxide semiconductor layer, a gate insulating film, and a gate electrode which partly overlap with one another is provided. The second oxide semiconductor layer is positi…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H01L29/7869. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 03 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).