High performance and low power TSPC latch with data agnostic setup and hold time
US-10826469-B2 · Nov 3, 2020 · US
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Srivastava Manish patents
Srivastava Manish is listed as an inventor on 10 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Srivastava Manish |
| Total patents | 10 |
| First publication | Oct 13, 2016 |
| Latest publication | Nov 3, 2020 |
Notable patents
Publications ranked by popularity score, then publication date.
High performance and low power tspc latch with data agnostic setup and hold time
US-2020274525-A1 · Aug 27, 2020 · US
Power transistor coupled to multiple sense transistors
US-10679938-B2 · Jun 9, 2020 · US
Performance power optimized full adder
US-10613829-B2 · Apr 7, 2020 · US
Power transistor coupled to multiple sense transistors
US-2020043849-A1 · Feb 6, 2020 · US
Performance power optimized full adder
US-2019354347-A1 · Nov 21, 2019 · US
Augmented intermediate voltage generator based core to pad level shifter
US-10063219-B1 · Aug 28, 2018 · US
High-speed soft-edge sense-amplifier-based flip-flop
US-10038429-B1 · Jul 31, 2018 · US
Area-delay-power efficient multibit flip-flop
US-9729128-B2 · Aug 8, 2017 · US
Area-Delay-Power Efficient Multibit Flip-Flop
US-2016301391-A1 · Oct 13, 2016 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Synopsys Inc | 4 |
| Qualcomm Inc | 4 |
| Texas Instruments Inc | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H03K3/012 | 4 |
| H03K3/35625 | 3 |
| H03K3/356165 | 2 |
| H03K19/20 | 2 |
| H03K19/212 | 2 |