Separate peak current checkpoints for closed and open block read ICC countermeasures in NAND memory
US-12456531-B2 · Oct 28, 2025 · US
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Shlick Mark patents
Shlick Mark is listed as an inventor on 32 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Shlick Mark |
| Total patents | 32 |
| First publication | Apr 30, 2015 |
| Latest publication | Oct 28, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Apparatus and method for selectively reducing charge pump speed during erase operations
US-12394491-B2 · Aug 19, 2025 · US
Record and playback commands for storage devices
US-12248397-B2 · Mar 11, 2025 · US
Record and playback commands for storage devices
US-2025036564-A1 · Jan 30, 2025 · US
Separate peak current checkpoints for closed and open block read icc countermeasures in nand memory
US-2024355400-A1 · Oct 24, 2024 · US
Apparatus and method for selectively reducing charge pump speed during erase operations
US-2024257878-A1 · Aug 1, 2024 · US
Data storage device with syndrome weight minimization for data alignment
US-11449236-B2 · Sep 20, 2022 · US
Intelligent memory wear leveling
US-11409443-B2 · Aug 9, 2022 · US
Temperature variation compensation
US-11385802-B2 · Jul 12, 2022 · US
Time division peak power management for non-volatile storage
US-11373710-B1 · Jun 28, 2022 · US
Recent patents
Latest publications not already listed above.
Intelligent memory wear leveling
US-2022171541-A1 · Jun 2, 2022 · US
Data storage device with syndrome weight minimization for data alignment
US-2021342095-A1 · Nov 4, 2021 · US
Temperature variation compensation
US-2020225852-A1 · Jul 16, 2020 · US
Temperature variation compensation
US-10642510-B2 · May 5, 2020 · US
Partial program operation of memory wordline
US-10580495-B2 · Mar 3, 2020 · US
Dynamically assigning data latches
US-10481816-B2 · Nov 19, 2019 · US
Event-driven schemes for determining suspend/resume periods
US-10360045-B2 · Jul 23, 2019 · US
Distributed program operation
US-2019198113-A1 · Jun 27, 2019 · US
Dynamically assigning data latches
US-2019114103-A1 · Apr 18, 2019 · US
Memory operation threshold adjustment based on bit line integrity data
US-10162538-B2 · Dec 25, 2018 · US
Event-driven schemes for determining suspend/resume periods
US-2018307503-A1 · Oct 25, 2018 · US
Temperature variation compensation
US-2018293009-A1 · Oct 11, 2018 · US
Temperature variation compensation
US-9996281-B2 · Jun 12, 2018 · US
Temperature variation compensation
US-2017255403-A1 · Sep 7, 2017 · US
Non-volatile memory with in field failure prediction using leakage detection
US-9711227-B1 · Jul 18, 2017 · US
Memory operation threshold adjustment based on bit line integrity data
US-2017090788-A1 · Mar 30, 2017 · US
Decoding data using bit line defect information
US-9484114-B1 · Nov 1, 2016 · US
Batch command techniques for a data storage device
US-9400747-B2 · Jul 26, 2016 · US
System and method for write abort detection
US-2016125960-A1 · May 5, 2016 · US
Power drop protection for a data storage device
US-9218851-B2 · Dec 22, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Western Digital Tech Inc | 16 |
| Sandisk Technologies Inc | 11 |
| Sandisk Technologies Llc | 9 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G11C16/10 | 16 |
| G06F3/0679 | 14 |
| G11C11/5628 | 14 |
| G11C11/5642 | 11 |
| G06F3/0619 | 11 |