Record and playback commands for storage devices

Patent metadata

Field	Value
Publication number	US-12248397-B2
Application number	US-202318361531-A
Country	US
Kind code	B2
Filing date	Jul 28, 2023
Priority date	Jul 28, 2023
Publication date	Mar 11, 2025
Grant date	Mar 11, 2025

Abstract

Methods for recording commands in memory and providing the recorded commands. In one embodiment, a data storage controller includes a memory interface configured to interface with a memory, a controller memory including a storage firmware and a record mapping table, and a processor. The processor, when executing the storage firmware, is configured to receive a record identifier, receive a command including data to be stored in the memory, and create an entry in the record mapping table associating the record identifier with a logical block address of the command. The command is received after the record identifier. The processor may receive a playback identifier that includes the record identifier and determine, using the record mapping table, a location of the associated command in the memory. The command is provided to an external device.

First claim

What is claimed is:

1. A data storage controller, comprising:
a memory interface configured to interface with a memory;
a controller memory including a storage firmware and a record mapping table; and
a processor communicatively connected to the controller memory, wherein the processor, when executing the storage firmware, is configured to:
receive a record identifier,
receive a command including data to be stored in the memory, the command received after the record identifier, and
create an entry in the record mapping table associating the record identifier with a logical block address of the command in the memory.

2. The data storage controller of claim 1 , wherein the processor, when executing the storage firmware, is further configured to:
receive a second command including second data to be stored in the memory, the second command received after the record identifier and the command, and
update the entry in the record mapping table associating the record identifier with a logical block address of the second command in the memory.

3. The data storage controller of claim 1 , wherein the processor, when executing the storage firmware, is further configured to:
receive an end command identifier associated with the record identifier, the end command identifier received after the record identifier and the command,
receive, after receiving the end command identifier, a second command including second data to be stored in the memory, and
store the second data in the memory without updating the record mapping table.

4. The data storage controller of claim 3 , wherein the processor, when executing the storage firmware, is further configured to:
receive a second entry including a second record identifier and a second logical block address associated with the second record identifier, and
update the record mapping table to include the second entry.

5. The data storage controller of claim 1 , wherein the record mapping table includes:
a record identifier column configured to store the record identifier,
a logical block address column configured to store the logical block address of the command associated with the record identifier and stored in the memory, and
a performance time column configured to store an expected performance time of the command associated with the record identifier.

6. The data storage controller of claim 1 , wherein the processor, when executing the storage firmware, is further configured to:
receive a pause identifier associated with the record identifier, the pause identifier received after the record identifier and the command,
receive, after receiving the pause identifier, a second command including second data to be stored in the memory,
store the second data in the memory without updating the entry in the record mapping table,
receive a resume identifier associated with the record identifier, the resume identifier received after the second command,
receive, after receiving the resume identifier, a third command including third data to be stored in the memory, and
update the entry in the record mapping table associating the record identifier with a logical block address of the third command.

7. The data storage controller of claim 1 , wherein the command is a first command, and wherein the processor, when executing the storage firmware, is further configured to:
receive an avoid copy identifier, the avoid copy identifier received after the record identifier and the command,
receive, after receiving the avoid copy identifier, a plurality of second commands including second data to be stored in the memory,
determine whether the plurality of second commands include the first command, and
update, when the plurality of second commands include the first command, the record mapping table to include the plurality of second commands without updating the record mapping table to include the first command.

8. The data storage controller of claim 1 , wherein the processor, when executing the storage firmware, is further configured to:
receive a playback identifier including the record identifier,
determine, using the record mapping table and the record identifier, a location of the command in the memory, and
provide data associated with the command to an external device.

9. The data storage controller of claim 1 , wherein the processor, when executing the storage firmware, is further configured to:
receive a playback identifier including the record identifier and an offset value,
determine, using the record mapping table, the record identifier, and the offset value, an initial playback command, and
provide data associated with the initial playback command to an external device.

10. The data storage controller of claim 9 , wherein the offset value is a second logical block address.

11. The data storage controller of claim 1 , wherein the processor, when executing the storage firmware, is further configured to:
receive, from an external device, a request for the entry in the record mapping table, and
provide the entry to the external device.

12. A method comprising:
receiving, with a storage controller executing a storage firmware, a record identifier;
receiving, with the storage controller, a command including data to be stored in a memory, the command received after the record identifier; and
creating, with the storage controller, an entry in a record mapping table associating the record identifier with a logical block address of the command.

13. The method of claim 12 , further comprising:
receiving, with the storage controller, a second command including second data to be stored in the memory, the second command received after the record identifier and the command, and
updating, with the storage controller, the entry in the record mapping table associating the record identifier with a logical block address of the second command.

14. The method of claim 12 , further comprising:
receiving, with the storage controller, an end command identifier, the end command identifier received after the record identifier and the command,
receiving, with the storage controller, after receiving the end command identifier, a second command including second data to be stored in the memory, and
storing the second data in the memory without updating the record mapping table.

15. The method of claim 12 , further comprising:
receive a pause identifier, the pause identifier received after the record identifier and the command,
receive, after receiving the pause identifier, a second command including second data to be stored in the memory,
store the second data in the memory without updating the record mapping table,
receive a resume identifier, the resume identifier received after the pause identifier and the second command,
receive, after receiving the resume identifier, a third command including third data to be stored in the memory, and
update the entry in the record mapping table associating the record identifier with a logical block address of the third command.

16. The method of claim 12 , further comprising:
receiving a playback identifier including the record identifier,
determining, using the record mapping table and the record identifier, a location of the command in the memory, and
providing data associated with the command to an external device.

17. The method of claim 12 , further comprising:
receiving a playback identifier including the record identifier and an offset value,
determining, using the record mapping table, the record identifier, and the offset value, an initial playback command

Assignees

• Western Digital Tech Inc
• Sandisk Technologies Inc

Inventors

• Linnen Daniel J
• Muthiah Ramanathan
• Yang Niles
• Hahn Judah Gamliel
• Shlick Mark

Classifications

• G06F2212/2022

  Flash memory · CPC title

• G06F2212/466

  Metadata, control data · CPC title

• G06F2212/7201

  Logical to physical mapping or translation of blocks or pages · CPC title

• G06F12/0292 Primary

  using tables or multilevel address translation means (G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10) · CPC title

• G06F12/0246 Primary

  in block erasable memory, e.g. flash memory · CPC title