Control of power state in computer processor
US-12596426-B2 · Apr 7, 2026 · US
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Rajagopal Pannerkumar patents
Rajagopal Pannerkumar is listed as an inventor on 30 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Rajagopal Pannerkumar |
| Total patents | 30 |
| First publication | Jul 16, 2020 |
| Latest publication | Apr 7, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Data backup and recovery using cache-coherent interconnect node-based non-volatile memory
US-2026056846-A1 · Feb 26, 2026 · US
Data backup and recovery using cache-coherent interconnect node-based non-volatile memory
US-12561210-B1 · Feb 24, 2026 · US
System management mode (SMM) error handler
US-12541412-B2 · Feb 3, 2026 · US
Methods and apparatus for adaptive keyboard scanning
US-12481373-B2 · Nov 25, 2025 · US
Apparatus and method for achieving deterministic power saving state
US-12306687-B2 · May 20, 2025 · US
Method, system and apparatus to prevent denial of service attacks on PCIe based computing devices
US-12292975-B2 · May 6, 2025 · US
PCIe deterministic link training using OOB communications and enumeration optimization during different power-up states
US-12253966-B2 · Mar 18, 2025 · US
Power management of a processor and a platform in active state and low power state
US-12007823-B2 · Jun 11, 2024 · US
Apparatus and method for restoring a password-protected endpoint device to an operational state from a low power state
US-11954501-B2 · Apr 9, 2024 · US
Recent patents
Latest publications not already listed above.
Configurable reduced memory startup
US-11922172-B2 · Mar 5, 2024 · US
Control of power state in computer processor
US-2024004454-A1 · Jan 4, 2024 · US
Apparatus and method for dynamic selection of an optimal processor core for power-up and/or sleep modes
US-11842202-B2 · Dec 12, 2023 · US
System management mode (smm) error handler
US-2023342234-A1 · Oct 26, 2023 · US
Reclaiming and reusing pre-boot reserved memory post-boot
US-11720401-B2 · Aug 8, 2023 · US
Apparatus and method for isolating and discharging a battery
US-2023096154-A1 · Mar 30, 2023 · US
Apparatus and method for restoring a password-protected endpoint device to an operational state from a low power state
US-2022413876-A1 · Dec 29, 2022 · US
Power management of a processor and a platform in active state and low power state
US-2022391003-A1 · Dec 8, 2022 · US
Memory map protection mechanism
US-11429289-B2 · Aug 30, 2022 · US
Method and apparatus for accurate measurement of platform power
US-11422173-B2 · Aug 23, 2022 · US
METHOD, SYSTEM AND APPARATUS TO PREVENT DENIAL OF SERVICE ATTACKS ON PCIe BASED COMPUTING DEVICES
US-2022215099-A1 · Jul 7, 2022 · US
Methods and apparatus for adaptive keyboard scanning
US-2022206591-A1 · Jun 30, 2022 · US
Secure device power-up apparatus and method
US-2022198022-A1 · Jun 23, 2022 · US
Apparatus and method for achieving deterministic power saving state
US-2022011842-A1 · Jan 13, 2022 · US
Granular power management of display devices based on user interest
US-2021373833-A1 · Dec 2, 2021 · US
Method and apparatus for accurate measurement of platform power
US-2021349134-A1 · Nov 11, 2021 · US
Apparatus and method for dynamic selection of an optimal processor core for power-up and/or sleep modes
US-2021124594-A1 · Apr 29, 2021 · US
Configurable reduced memory startup
US-2021026649-A1 · Jan 28, 2021 · US
Memory map protection mechanism
US-2020285403-A1 · Sep 10, 2020 · US
Reclaiming and reusing pre-boot reserved memory post-boot
US-2020225994-A1 · Jul 16, 2020 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 28 |
| Microsoft Technology Licensing Llc | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| Y02D10/00 | 11 |
| G06F9/4403 | 8 |
| G06F1/30 | 6 |
| G06F9/4418 | 6 |
| G06F9/4406 | 6 |