Method of manufacturing stacked nanowire MOS transistor
US-9892912-B2 · Feb 13, 2018 · US
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Qin Changliang patents
Qin Changliang is listed as an inventor on 8 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Qin Changliang |
| Total patents | 8 |
| First publication | Apr 14, 2015 |
| Latest publication | Feb 13, 2018 |
Notable patents
Publications ranked by popularity score, then publication date.
Method for manufacturing semiconductor device
US-9385212-B2 · Jul 5, 2016 · US
Method for manufacturing semiconductor device including doping epitaxial source drain extension regions
US-9337102-B2 · May 10, 2016 · US
Method for manufacturing semiconductor device
US-2016071952-A1 · Mar 10, 2016 · US
Method for manufacturing mosfet
US-2015380297-A1 · Dec 31, 2015 · US
Method of manufacturing mosfet
US-2015295068-A1 · Oct 15, 2015 · US
Method of manufacturing stacked nanowire mos transistor
US-2015228480-A1 · Aug 13, 2015 · US
Method of manufacturing semiconductor device
US-9006057-B2 · Apr 14, 2015 · US
Recent patents
Latest publications not already listed above.
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Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Inst Of Microelectronics Cas | 8 |
| Qin Changliang | 2 |
| Yin Huaxiang | 2 |
| Hong Peizhen | 1 |
| Inst Of Microelectronics Cas | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10P30/204 | 5 |
| H10D30/024 | 5 |
| H10P30/21 | 4 |
| H01L21/26513 | 4 |
| H10D62/021 | 4 |