Generating debuggable executables based on optimizing different compiler options for source code modules
US-12013773-B2 · Jun 18, 2024 · US
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Otte Carsten patents
Otte Carsten is listed as an inventor on 45 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Otte Carsten |
| Total patents | 45 |
| First publication | Jul 16, 2015 |
| Latest publication | Jun 18, 2024 |
Notable patents
Publications ranked by popularity score, then publication date.
Method and processor system for executing a TELT instruction to access a data item during execution of an atomic primitive
US-11681567-B2 · Jun 20, 2023 · US
Generating debuggable executables based on optimizing different compiler options for source code modules
US-2023185693-A1 · Jun 15, 2023 · US
Simulating a system of computing systems
US-11444843-B2 · Sep 13, 2022 · US
MMIO addressing using a translation lookaside buffer
US-11321240-B2 · May 3, 2022 · US
Executing an atomic primitive in a multi-core processor system
US-11321146-B2 · May 3, 2022 · US
Thermal capacity optimization for maximized single core performance
US-11188379-B2 · Nov 30, 2021 · US
I/O encryption device protected against malicious hypervisors
US-11055424-B2 · Jul 6, 2021 · US
Simulating a system of computing systems
US-2021168041-A1 · Jun 3, 2021 · US
Asymmetric storage data distribution
US-10983707-B2 · Apr 20, 2021 · US
Recent patents
Latest publications not already listed above.
MMIO addressing using a translation table
US-10929302-B2 · Feb 23, 2021 · US
Encryption with sealed keys
US-10911491-B2 · Feb 2, 2021 · US
Memory access based I/O operations
US-10901910-B2 · Jan 26, 2021 · US
Updating a database
US-10877992-B2 · Dec 29, 2020 · US
Executing an atomic primitive in a multi-core processor system
US-2020356420-A1 · Nov 12, 2020 · US
Executing multiple data requests of multiple-core processors
US-2020356485-A1 · Nov 12, 2020 · US
Executing an atomic primitive by a processor core
US-2020356418-A1 · Nov 12, 2020 · US
I/o encryption device protected against malicious hypervisors
US-2020193039-A1 · Jun 18, 2020 · US
Firmware or hardware component assist for memory mapped I/O
US-10606759-B2 · Mar 31, 2020 · US
Multi-core single-thread processing exceeding local maximum thermal power
US-2020097322-A1 · Mar 26, 2020 · US
Asymmetric storage data distribution
US-2020065009-A1 · Feb 27, 2020 · US
Asymmetric storage data distribution
US-10545681-B2 · Jan 28, 2020 · US
Asymmetric storage data distribution
US-10545683-B2 · Jan 28, 2020 · US
Mmio addressing using a translation table
US-2019377685-A1 · Dec 12, 2019 · US
Mmio addressing using a translation lookaside buffer
US-2019377687-A1 · Dec 12, 2019 · US
Memory access based i/o operations
US-2019310947-A1 · Oct 10, 2019 · US
Updating a database
US-2019163800-A1 · May 30, 2019 · US
Encryption with sealed keys
US-2019158536-A1 · May 23, 2019 · US
Firmware or hardware component assist for memory mapped i/o
US-2018203804-A1 · Jul 19, 2018 · US
Memory mapping for object-based storage devices
US-9928000-B2 · Mar 27, 2018 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| IBM | 45 |
| Otte Carsten | 1 |
| Borntraeger Christian | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F2212/1024 | 20 |
| G06F12/1009 | 14 |
| G06F2212/657 | 12 |
| G06F12/1027 | 12 |
| G06F3/0673 | 9 |