Variable Bypass Clock During Re-Lock Interval for Clock Control Circuitry
US-2026081607-A1 · Mar 19, 2026 · US
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Oppula Vivek patents
Oppula Vivek is listed as an inventor on 10 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Oppula Vivek |
| Total patents | 10 |
| First publication | Nov 24, 2016 |
| Latest publication | Mar 19, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Temperature-Based Voltage Margin Control
US-2026079562-A1 · Mar 19, 2026 · US
Adaptive voltage margin techniques
US-12498781-B2 · Dec 16, 2025 · US
Adaptive Voltage Margin Techniques
US-2025208694-A1 · Jun 26, 2025 · US
Microphone bias apparatus and method
US-10674296-B2 · Jun 2, 2020 · US
Synchronous differential signaling protocol
US-10305671-B2 · May 28, 2019 · US
Microphone bias apparatus and method
US-2019037327-A1 · Jan 31, 2019 · US
Synchronous, internal clock edge alignment for integrated circuit testing
US-10128828-B2 · Nov 13, 2018 · US
Synchronous, internal clock edge alignment for integrated circuit testing
US-2017310315-A1 · Oct 26, 2017 · US
Synchronous differential signaling protocol
US-2016344536-A1 · Nov 24, 2016 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Cirrus Logic Int Semiconductor Ltd | 6 |
| Apple Inc | 4 |
| Cirrus Logic Inc | 3 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| Y02D10/00 | 3 |
| G06F1/3206 | 3 |
| G06F1/28 | 3 |
| G06F1/3296 | 3 |
| H04L7/0008 | 2 |