Adaptive voltage margin techniques

Patent metadata

Field	Value
Publication number	US-12498781-B2
Application number	US-202318394997-A
Country	US
Kind code	B2
Filing date	Dec 22, 2023
Priority date	Dec 22, 2023
Publication date	Dec 16, 2025
Grant date	Dec 16, 2025

Abstract

Techniques are disclosed relating to power control and voltage margining. In some embodiments, first and second component circuits operate based on a supply voltage generated by a power supply. Voltage sensor circuitry may generate voltage measurements. Voltage margin control circuitry may determine a voltage ceiling based on a current operating state of the first component circuit and a current operating state of the second component circuit. The control circuitry may transmit control signals to the power supply to incrementally reduce the supply voltage until detecting a low-supply-voltage condition based on a voltage measurement generated by the voltage sensor circuitry. Disclosed techniques may advantageously provide voltage margin while reducing overall power consumption.

First claim

The invention claimed is:

1 . An apparatus, comprising:
a first component circuit configured to operate based on a supply voltage generated by power supply circuitry; a second component circuit configured to operate based on the supply voltage; voltage sensor circuitry configured to generate voltage measurements; voltage margin control circuitry configured to:
determine a voltage ceiling based on a current operating state of the first component circuit and a current operating state of the second component circuit, including to:
determine a first voltage ceiling based on a first scenario with clock gating of at least a portion of the first component circuit and a first performance state of the second component circuit; and
determine a second voltage ceiling based on a second scenario with no clock gating of the first component circuit and a second performance state of the second component circuit;

determine a low-supply-voltage condition based on a voltage measurement generated by the voltage sensor circuitry; and
transmit control signals to the power supply circuitry to:
prior to the determination of the low-supply-voltage condition:
provide the supply voltage at a first voltage level that is at or below the first voltage ceiling;
perform a reduction in the supply voltage, during operation of at least the first component circuit, to a second voltage level that is below the first voltage level; and
perform a reduction in the supply voltage, during operation of at least the first component circuit, to a third voltage level that is below the second voltage level; and

in response to the determination of the low-supply-voltage condition, increase the supply voltage to a fourth voltage level that is above the third voltage level.

2 . The apparatus of claim 1 , wherein the voltage margin control circuitry is configured to periodically determine whether to perform a reduction in the supply voltage or to increase the supply voltage based on a voltage measurement.

3 . The apparatus of claim 1 , wherein the voltage margin control circuitry is configured to control the power supply circuitry to change the voltage level of the supply voltage in response to an asynchronous event, wherein the voltage margin control circuitry supports at least the following asynchronous events:
a change in power performance state; an indication that a component circuit is busy or idle; and a low voltage warning corresponding to a lower measured voltage than the low-supply-voltage condition.

4 . The apparatus of claim 1 , wherein the voltage margin control circuitry is configured to control an amount of the reduction to the second voltage level based on estimated voltage droop information.

5 . The apparatus of claim 1 , wherein the current operating state of multiple component circuits includes activity information.

6 . The apparatus of claim 1 , wherein the voltage margin control circuitry is configured to adjust a current voltage ceiling based on a change in the operating state of multiple component circuits.

7 . The apparatus of claim 6 , wherein the multiple component circuits include ray tracing accelerator circuitry and matrix multiplier accelerator circuitry.

8 . The apparatus of claim 1 , wherein in response to a component circuit being powered up:
processor circuitry is configured to monitor for an instruction that targets the component; in response to an instruction that targets the component:
the voltage margin control circuitry is configured to adjust a current voltage ceiling and control the power supply circuitry to increase voltage margin for operation of the component;
the processor circuitry is configured to operate the component at a partial rate until the supply voltage increases based on the adjustment to the current voltage ceiling; and
the processor circuitry is configured to begin operating the component at a full rate once the increase in voltage margin for operation of the component is complete.

9 . The apparatus of claim 1 , wherein an amount of the increase in the supply voltage to the fourth voltage level is programmable.

10 . The apparatus of claim 1 , wherein the voltage sensor circuitry is configured to compare a voltage sensor output with a per-power-performance-state value to detect the low-supply-voltage condition.

11 . The apparatus of claim 10 , further comprising filter circuitry configured to filter the voltage sensor output prior to comparison with the per-power-performance-state value.

12 . The apparatus of claim 1 , further comprising a power control co-processor configured to execute a step control program to determine step sizes for the voltage margin control circuitry.

13 . The apparatus of claim 1 , further comprising:
the power supply circuitry.

14 . The apparatus of claim 1 , wherein the apparatus is a computing device that further comprises:
a display; a central processing unit; and a network interface.

15 . A method, comprising:
operating, by a computing system, first component circuit based on a supply voltage generated by power supply circuitry; operating, by the computing system, second component circuit based on the supply voltage; generating, by the computing system using sensor circuitry, voltage measurements; determining, by the computing system, a voltage ceiling based on a current operating state of the first component circuit and a current operating state of the second component circuit, including:
determining a first voltage ceiling based on a first scenario with clock gating of at least a portion of the first component circuit and a first performance state of the second component circuit; and
determining a second voltage ceiling based on a second scenario with no clock gating of the first component circuit and a second performance state of the second component circuit;
determining, by the computing system, a low-supply-voltage condition based on a voltage measurement generated by the sensor circuitry; and transmitting control signals to the power supply circuitry to:
prior to the determination of the low-supply-voltage condition:
provide the supply voltage at a first voltage level that is at or below the first voltage ceiling;
perform a reduction in the supply voltage, during operation of at least the first component circuit, to a second voltage level that is below the first voltage level; and
perform a reduction in the supply voltage, during operation of at least the first component circuit, to a third voltage level that is below the second voltage level; and

in response to the determining the low-supply-voltage condition, increase the supply voltage to a fourth voltage level that is above the third voltage level.

16 . The method of claim 15 , wherein the transmitting is based on periodically determining whether to perform a reduction in the supply voltage or to increase the supply voltage based on a voltage measurement.

17 . The method of claim 16 , further comprising:
controlling the power supply circuitry to change the voltage level of the supply voltage in response to an asynchronous event.

18 . The method of claim 15 , wherein the current operating state of multiple component circuits includes activity information.

19 . The method of claim 15 , further comprising:
executing a step control program to determine step sizes for the reductions.

20 . A system, comprising:
power supply circuitry; a first component circuit configured to operate based on a supply voltage generated by

Assignees

• Apple Inc

Inventors

• Socarras Angel E
• Oppula Vivek
• Jubelin Benoit M
• Ikonomopoulos Gus P
• Jane Jason P

Classifications

• G06F1/3228 Primary

  Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands · CPC title

• G06F1/3275

  Power saving in memory, e.g. RAM, cache · CPC title

• G06F1/324

  by lowering clock frequency · CPC title

• G06F1/305

  in the event of power-supply fluctuations · CPC title

• G06F1/3206

  Monitoring of events, devices or parameters that trigger a change in power modality · CPC title