Memory device and refresh information coherence method thereof
US-10692558-B2 · Jun 23, 2020 · US
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Lo Chih-Yen patents
Lo Chih-Yen is listed as an inventor on 9 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Lo Chih-Yen |
| Total patents | 9 |
| First publication | May 12, 2016 |
| Latest publication | Jun 23, 2020 |
Notable patents
Publications ranked by popularity score, then publication date.
Memory device and refresh information coherence method thereof
US-2020135255-A1 · Apr 30, 2020 · US
Memory controller, control method for the memory controller, and control method for memory
US-10423548-B2 · Sep 24, 2019 · US
Memory control circuit and memory test method
US-10311964-B2 · Jun 4, 2019 · US
Memory controller, control method for the memory controller, and control method for memory
US-2019155764-A1 · May 23, 2019 · US
Memory control circuit and memory test method
US-2018182466-A1 · Jun 28, 2018 · US
Fault-tolerance through silicon via interface and controlling method thereof
US-9588717-B2 · Mar 7, 2017 · US
3-D memory and built-in self-test circuit thereof
US-9406401-B2 · Aug 2, 2016 · US
Fault-tolerance through silicon via interface and controlling method thereof
US-2016132403-A1 · May 12, 2016 · US
Recent patents
Latest publications not already listed above.
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Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Ind Tech Res Inst | 9 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G11C11/40611 | 4 |
| G11C29/16 | 3 |
| G11C29/14 | 2 |
| G11C29/36 | 2 |
| H10W90/722 | 2 |