High-density microbump and probe pad arrangement for semiconductor components
US-12033903-B1 · Jul 9, 2024 · US
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Jayakumar Nikhil patents
Jayakumar Nikhil is listed as an inventor on 16 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Jayakumar Nikhil |
| Total patents | 16 |
| First publication | Jul 2, 2015 |
| Latest publication | Jul 9, 2024 |
Notable patents
Publications ranked by popularity score, then publication date.
Power management and staggering transitioning from idle mode to operational mode
US-11994925-B2 · May 28, 2024 · US
System and method to manage power throttling
US-11687136-B2 · Jun 27, 2023 · US
System and method to manage power throttling
US-2022244767-A1 · Aug 4, 2022 · US
System and method to manage power throttling
US-11340673-B1 · May 24, 2022 · US
Approach for chip-level flop insertion and verification based on logic interface definition
US-10303626-B2 · May 28, 2019 · US
Baseboard interconnection device, system and method
US-10198389-B2 · Feb 5, 2019 · US
Determination of flip-flop count in physical design
US-9792400-B2 · Oct 17, 2017 · US
System for and method of placing clock stations using variable drive-strength clock drivers built out of a smaller subset of base cells for hybrid tree-mesh clock distribution networks
US-9443053-B2 · Sep 13, 2016 · US
System for and method of combining CMOS inverters of multiple drive strengths to create tune-able clock inverters of variable drive strengths in hybrid tree-mesh clock distribution networks
US-9390209-B2 · Jul 12, 2016 · US
Recent patents
Latest publications not already listed above.
System for and method of tuning clock networks constructed using variable drive-strength clock inverters with variable drive-strength clock drivers built out of a smaller subset of base cells
US-9305129-B2 · Apr 5, 2016 · US
Network device, system and method having a rotated chip floorplan
US-2016014885-A1 · Jan 14, 2016 · US
Baseboard interconnection device, system and method
US-2016012006-A1 · Jan 14, 2016 · US
System for and method of placing and routing clock stations using variable drive-strength clock drivers built out of a smaller subset of base cells for hybrid tree-mesh clock distribution networks
US-2015186589-A1 · Jul 2, 2015 · US
System for and method of combining cmos inverters of multiple drive strengths to create tune-able clock inverters of variable drive strengths in hybrid tree-mesh clock distribution networks
US-2015186560-A1 · Jul 2, 2015 · US
System for and method of tuning clock networks constructed using variable drive-strength clock inverters with variable drive-strength clock drivers built out of a smaller subset of base cells
US-2015186583-A1 · Jul 2, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Xpliant Inc | 8 |
| Cavium Inc | 5 |
| Marvell Asia Pte Ltd | 4 |
| Cavium Llc | 2 |
| Xpliant | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F2119/12 | 6 |
| G06F30/394 | 6 |
| G06F30/396 | 6 |
| G06F2217/84 | 5 |
| G06F1/324 | 4 |