Techniques for shared private data objects in a trusted execution environment
US-12041037-B2 · Jul 16, 2024 · US
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Held James P patents
Held James P is listed as an inventor on 21 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Held James P |
| Total patents | 21 |
| First publication | Mar 12, 2015 |
| Latest publication | Jul 16, 2024 |
Notable patents
Publications ranked by popularity score, then publication date.
Techniques for shared private data objects in a trusted execution environment
US-2023396593-A1 · Dec 7, 2023 · US
Techniques for shared private data objects in a trusted execution environment
US-11770368-B2 · Sep 26, 2023 · US
Techniques for shared private data objects in a trusted execution environment
US-2022182365-A1 · Jun 9, 2022 · US
Techniques for shared private data objects in a trusted execution environment
US-11271910-B2 · Mar 8, 2022 · US
Techniques for shared private data objects in a trusted execution environment
US-2020244628-A1 · Jul 30, 2020 · US
Techniques for shared private data objects in a trusted execution environment
US-10554634-B2 · Feb 4, 2020 · US
Technology for secure partitioning and updating of a distributed digital ledger
US-10540652-B2 · Jan 21, 2020 · US
Mechanism for instruction set based thread execution on a plurality of instruction sequencers
US-10452403-B2 · Oct 22, 2019 · US
Techniques for shared private data objects in a trusted execution environment
US-2019058696-A1 · Feb 21, 2019 · US
Recent patents
Latest publications not already listed above.
Technology for secure partitioning and updating of a distributed digital ledger
US-2018145836-A1 · May 24, 2018 · US
Guest-specific microcode
US-9747118-B2 · Aug 29, 2017 · US
Instruction set architecture-based inter-sequencer communications with a heterogeneous resource
US-9588771-B2 · Mar 7, 2017 · US
Mechanism for instruction set based thread execution on a plurality of instruction sequencers
US-2017010895-A1 · Jan 12, 2017 · US
System, apparatus and method for performing cryptographic operations in a trusted execution environment
US-2016379212-A1 · Dec 29, 2016 · US
Instruction set architecture-based inter-sequencer communications with a heterogeneous resource
US-9459874-B2 · Oct 4, 2016 · US
Method and system to provide user-level multithreading
US-9442721-B2 · Sep 13, 2016 · US
Method and system to provide concurrent user-level, non-privileged shared resource thread creation and execution
US-9189230-B2 · Nov 17, 2015 · US
Processsor integral technologies for BIOS flash attack protection and notification
US-9015455-B2 · Apr 21, 2015 · US
Providing hardware support for shared virtual memory between local and remote physical memory
US-9003164-B2 · Apr 7, 2015 · US
Instruction Set Architecture-Based Inter-Sequencer Communications With A Heterogeneous Resource
US-2015070368-A1 · Mar 12, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 21 |
| Held James P | 3 |
| Grochowski Edward T | 1 |
| Wang Hong | 1 |
| Shen John P | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H04L9/50 | 11 |
| H04L9/3236 | 10 |
| H04L9/3247 | 10 |
| G06F21/6218 | 8 |
| H04L63/123 | 8 |