Wirelessly synchronized clock networks
US-10687293-B2 · Jun 16, 2020 · US
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Bal Jagdeep patents
Bal Jagdeep is listed as an inventor on 12 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Bal Jagdeep |
| Total patents | 12 |
| First publication | Jun 7, 2016 |
| Latest publication | Jun 16, 2020 |
Notable patents
Publications ranked by popularity score, then publication date.
Wirelessly synchronized clock networks
US-2019223128-A1 · Jul 18, 2019 · US
Wirelessly synchronized clock networks
US-10264542-B2 · Apr 16, 2019 · US
Separate clock synchronous architecture
US-10261539-B2 · Apr 16, 2019 · US
Separate clock synchronous architecture
US-2018284835-A1 · Oct 4, 2018 · US
Wirelessly synchronized clock networks
US-2018288718-A1 · Oct 4, 2018 · US
System and method for deskewing output clock signals
US-9614508-B1 · Apr 4, 2017 · US
Dual mode clock using a common resonator and associated method of use
US-9581973-B1 · Feb 28, 2017 · US
Methods and systems for analog-to-digital conversion (ADC) using an ultra small capacitor array with full range and sub-range modes
US-9553602-B1 · Jan 24, 2017 · US
Crystal-less jitter attenuator
US-9553570-B1 · Jan 24, 2017 · US
Recent patents
Latest publications not already listed above.
Fractional reference-injection PLL
US-9369139-B1 · Jun 14, 2016 · US
Low-spurious fractional N-frequency divider and method of use
US-9362928-B1 · Jun 7, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Integrated Device Tech | 12 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H04L7/04 | 4 |
| H04W56/0015 | 4 |
| H04L7/0008 | 4 |
| H03B2200/009 | 2 |
| H03L7/0995 | 2 |