Memory devices having signal routing structures at bonding interfaces
US-2024404976-A1 · Dec 5, 2024 · US
Electricity
Electricity · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H10W80/327 |
| Official title | — |
| Display label | Electricity (mapped technology topic) |
| Total patents | 5,982 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is growing.
| Year | Patents |
|---|---|
| 2015 | 112 |
| 2016 | 126 |
| 2017 | 147 |
| 2018 | 202 |
| 2019 | 255 |
| 2020 | 471 |
| 2021 | 679 |
| 2022 | 788 |
| 2023 | 885 |
| 2024 | 949 |
| 2025 | 1,084 |
| 2026 | 284 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Semiconductor device manufacturing method and semiconductor device manufactured using the same
US-2024395745-A1 · Nov 28, 2024 · US
Semiconductor device and method of manufacturing same
US-2024395697-A1 · Nov 28, 2024 · US
Semiconductor memory device and manufacturing method of semiconductor memory device
US-12144179-B2 · Nov 12, 2024 · US
Circuit assembly
US-2024371747-A1 · Nov 7, 2024 · US
Microelectronic assemblies with inductors in direct bonding regions
US-2024355768-A1 · Oct 24, 2024 · US
Semiconductor memory device
US-2024315058-A1 · Sep 19, 2024 · US
Bonding tool for providing chip on wafer bond and methods for performing the same
US-2024274461-A1 · Aug 15, 2024 · US
Conductive barrier direct hybrid bonding
US-2024243085-A1 · Jul 18, 2024 · US
Composite interposer structure and method of providing same
US-12014990-B2 · Jun 18, 2024 · US
Chip package structure and method for preparing chip package structure
US-2024178167-A1 · May 30, 2024 · US
Apparatus for non-volatile random access memory stacks
US-2024145438-A1 · May 2, 2024 · US
Clock tree routing in a chip stack
US-2024103562-A1 · Mar 28, 2024 · US
Stacked semiconductor method and apparatus
US-2024096745-A1 · Mar 21, 2024 · US
Semiconductor package and manufacturing method thereof
US-2024063160-A1 · Feb 22, 2024 · US
Package architecture of scalable compute wall having compute bricks with vertically stacked dies
US-2024006395-A1 · Jan 4, 2024 · US
Stacked ic control through the use of homogenous region
US-2015380385-A1 · Dec 31, 2015 · US
Soi with gold-doped handle wafer
US-2015371905-A1 · Dec 24, 2015 · US
Method of manufacturing a semiconductor device
US-2015364458-A1 · Dec 17, 2015 · US
Bonded structure employing metal semiconductor alloy bonding
US-9214388-B2 · Dec 15, 2015 · US
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H10W80/327?
- CPC H10W80/327 is the Cooperative Patent Classification code for “Electricity.”
- How many patents are filed under CPC H10W80/327 (Electricity)?
- Our database includes 5,982 publications tagged with this CPC code.
- Is patent activity under CPC H10W80/327 growing?
- Publication counts under this code: 949 in 2024 vs 1,084 in 2025 (latest complete years).