Return to open DAC with resistor bypass on reset
US-12418307-B2 · Sep 16, 2025 · US
by suppressing active signals at predetermined times, e.g. muting, using non-overlapping clock phases
by suppressing active signals at predetermined times, e.g. muting, using non-overlapping clock phases · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H03M3/346 |
| Official title | {by suppressing active signals at predetermined times, e.g. muting, using non-overlapping clock phases} |
| Display label | by suppressing active signals at predetermined times, e.g. muting, using non-overlapping clock phases |
| Total patents | 29 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is rapidly declining.
| Year | Patents |
|---|---|
| 2015 | 2 |
| 2016 | 5 |
| 2017 | 5 |
| 2018 | 1 |
| 2019 | 1 |
| 2020 | 3 |
| 2021 | 4 |
| 2022 | 1 |
| 2024 | 6 |
| 2025 | 1 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Transition smoothing apparatus for reducing spurious input to a system under feedback control
US-2024388304-A1 · Nov 21, 2024 · US
Return to open dac with resistor bypass on reset
US-2024380413-A1 · Nov 14, 2024 · US
Transition smoothing apparatus for reducing spurious input to a system under feedback control
US-12081228-B2 · Sep 3, 2024 · US
System and method of reducing delta-sigma modulator error using force-and-correction
US-12015426-B2 · Jun 18, 2024 · US
System and method of reducing delta-sigma modulator error using force-and-correction
US-2024048150-A1 · Feb 8, 2024 · US
Transition smoothing apparatus for reducing spurious input to a system under feedback control
US-2024030930-A1 · Jan 25, 2024 · US
Delay-based spread spectrum clock generator circuit
US-11323131-B2 · May 3, 2022 · US
Frequency ratio measurement device
US-11139825-B2 · Oct 5, 2021 · US
Delay-based spread spectrum clock generator circuit
US-2021135681-A1 · May 6, 2021 · US
Frequency Ratio Measurement Device
US-2021067170-A1 · Mar 4, 2021 · US
Analog-to-digital converter and microphone including the same
US-10938398-B2 · Mar 2, 2021 · US
Utilizing current memory property in current steering digital-to-analog converters
US-10819365-B1 · Oct 27, 2020 · US
Increased noise performance using quantizer code suppression
US-10727860-B1 · Jul 28, 2020 · US
Analog-to-digital converter and microphone including the same
US-2020186157-A1 · Jun 11, 2020 · US
Idle tone dispersion device and frequency ratio measuring device
US-10355708-B2 · Jul 16, 2019 · US
Idle Tone Dispersion Device And Frequency Ratio Measuring Device
US-2018343014-A1 · Nov 29, 2018 · US
Methods and apparatus for an analog-to-digital converter
US-9787320-B1 · Oct 10, 2017 · US
Signal modulation circuit
US-9787319-B2 · Oct 10, 2017 · US
Signal transfer function equalization in multi-stage delta-sigma analog-to-digital converters
US-9742426-B2 · Aug 22, 2017 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H03M3/346?
- CPC H03M3/346 is the Cooperative Patent Classification code for “by suppressing active signals at predetermined times, e.g. muting, using non-overlapping clock phases.”
- How many patents are filed under CPC H03M3/346 (by suppressing active signals at predetermined times, e.g. muting, using non-overlapping clock phases)?
- Our database includes 29 publications tagged with this CPC code.
- Is patent activity under CPC H03M3/346 growing?
- Publication counts under this code: 6 in 2024 vs 1 in 2025 (latest complete years).