Analog-to-digital converter and microphone including the same

Patent metadata

Field	Value
Publication number	US-10938398-B2
Application number	US-202016790598-A
Country	US
Kind code	B2
Filing date	Feb 13, 2020
Priority date	Sep 5, 2017
Publication date	Mar 2, 2021
Grant date	Mar 2, 2021

Abstract

An analog-to-digital converter (ADC) includes a first operator configured to subtract an analog value from an analog signal; an amplifier configured to amplify an output of the first selector; a filter configured to filter an output of the amplifier; a quantizer configured to generate a digital bit stream from an output of the filter; and a digital-to-analog converter (DAC) configured to output the analog value according to the digital bit stream.

First claim

What is claimed is:

1. An analog-to-digital converter (ADC) comprising:
a first operator configured to subtract an analog value from an analog signal;
a detector configured to output a selection signal according to magnitude of the analog signal;
a first selector configured to select the analog signal or an output of the first operator according to the selection signal;
an amplifier configured to amplify an output of the first selector;
a second operator configured to subtract the analog value from an output signal from the amplifier;
a second selector configured to select the output of the amplifier or an output of the second operator according to the selection signal;
a filter configured to filter an output of the second selector;
a quantizer configured to generate a digital bit stream from an output of the filter; and
a digital-to-analog converter (DAC) configured to output the analog value according to the digital bit stream,
wherein the first selector selects the analog signal and the second selector selects an output of the second operator when the analog signal is less than a predetermined value and the first selector selects an output of the first operator and the second selector selects an output of the amplifier when the analog signal is greater than the predetermined value.

2. The ADC of claim 1 , further comprising a decimator configured to output a digital signal from the digital bit stream.

3. The ADC of claim 2 , wherein the detector generates the selection signal by comparing magnitude of the digital signal with a threshold value.

4. The ADC of claim 3 , wherein the detector comprises a converting circuit configured to output a magnitude signal corresponding to magnitude of the digital signal and a comparator configured to output the selection signal by comparing an envelope detected from the magnitude signal with the threshold value.

5. The ADC of claim 4 , wherein the comparator comprises a low-pass filter detecting the envelope from the magnitude signal.

6. A microphone comprising:
a MEMS device configured to output an analog signal from a sound signal; and
an analog-to-digital converter (ADC) configured to output a digital signal from the analog signal,
wherein the ADC comprises:
a first operator configured to subtract an analog value from the analog signal;
a detector configured to output a selection signal according to magnitude of the analog signal;
a first selector configured to select the analog signal or an output of the first operator according to the selection signal;
an amplifier configured to amplify an output of the first selector;
a second operator configured to subtract the analog value from an output signal from the amplifier;
a second selector configured to select the output of the amplifier or an output of the second operator according to the selection signal;
a filter configured to filter an output of the second selector;
a quantizer configured to generate a digital bit stream from an output of the filter; and
a digital-to-analog converter (DAC) configured to output the analog value according to the digital bit stream,
wherein the first selector selects the analog signal and the second selector selects an output of the second operator when the analog signal is less than a predetermined value and the first selector selects an output of the first operator and the second selector selects an output of the amplifier when the analog signal is greater than the predetermined value.

7. The microphone of claim 6 , further comprising a decimator configured to output the digital signal from the digital bit stream.

8. The microphone of claim 7 , wherein the detector generates the selection signal by comparing magnitude of the digital signal with a threshold value.

9. The microphone of claim 8 , wherein the detector comprises a converting circuit configured to output a magnitude signal corresponding to magnitude of the digital signal and a comparator configured to output the selection signal by comparing an envelope detected from the magnitude signal with the threshold value.

10. The microphone of claim 9 , wherein the comparator comprises a low-pass filter detecting the envelope from the magnitude signal.

Assignees

• Seoul Nat Univ R&Db Foundation

Inventors

• Kim Suhwan
• Cho Junsoo
• Yang Youngtae

Classifications

• H03M1/183

  the feedback signal controlling the gain of an amplifier or attenuator preceding the analogue/digital converter · CPC title

• H03M1/002

  Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed · CPC title

• H03M1/129

  Means for adapting the input signal to the range the converter can handle, e.g. limiting, pre-scaling (H03M1/18 takes precedence); Out-of-range indication · CPC title

• H04R2201/003

  Mems transducers or their use · CPC title

• H03M3/424 Primary

  the quantiser being a multiple bit one · CPC title